[Bug tree-optimization/59445] [4.9 Regression] ICE in add_old_iv_candidates, at tree-ssa-loop-ivopts.c:2541

["amker.cheng at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59445

--- Comment #14 from bin.cheng <amker.cheng at gmail dot com> ---
I found out the root cause of this ICE and will use the simplified code given
by comment#9 as an example.

The gimple dump before IVOPT is like:

  <bb 2>:

  <bb 3>:
  # c_2 = PHI <c_5(D)(2), c_3(9)>
  __val_comp_iter<F::G> (D.4949);
  p2 = D.4950;
  c_6 = c_2 + 4294967292;
  _21 = MEM[(int *)c_2 + 4294967292B];
  if (a_11(D) != 0)
    goto <bb 4>;
  else
    goto <bb 5>;

  <bb 4>:
  c_3 = c_2 + 4;
  goto <bb 9>;

  <bb 5>:
  goto <bb 7>;

  <bb 6>:
  # c_23 = PHI <c_28(11), c_7(10)>
  # _24 = PHI <_29(11), _22(10)>

  <bb 7>:
  # c_20 = PHI <c_15(6), c_2(5)>
  # c_15 = PHI <c_23(6), c_6(5)>
  # _26 = PHI <_24(6), _21(5)>
  if (_26 != 0)
    goto <bb 11>;
  else
    goto <bb 8>;

  <bb 8>:
  D::m_fn1 (&MEM[(struct G *)&p2].MFI);
  if (_13(D) != 0)
    goto <bb 10>;
  else
    goto <bb 4>;

  <bb 9>:
  goto <bb 3>;

  <bb 10>:
  *c_20 = 0;
  c_7 = c_15 + 4294967292;
  _22 = *c_7;
  goto <bb 6>;

  <bb 11>:
  *c_20 = 0;
  c_28 = c_15 + 4294967292;
  _29 = *c_28;
  goto <bb 6>;

With the patch:
STEP1: # c_20 = PHI <c_15(6), c_2(5)> is recognized as an iv. 
STEP2: Since # c_15 = PHI <c_23(6), c_6(5)> comes from a merging conditional
branches, it shouldn't be marked as a biv in mark_bivs.
STEP3: When mark_bivs handling "# c_20 = PHI <c_15(6), c_2(5)>",it should know
that this is a peeled iv and not mark either iv(c_20) or incr_iv(c_15) as bivs.

Unfortunately, this patch should add logic in mark_bivs to skip peeled iv,
rather than give an assert later when adding candidates for bivs.

The following patch should fix this problem:
@@ -1074,7 +1074,7 @@ find_bivs (struct ivopts_data *data)
 static void
 mark_bivs (struct ivopts_data *data)
 {
-  gimple phi;
+  gimple phi, def;
   tree var;
   struct iv *iv, *incr_iv;
   struct loop *loop = data->current_loop;
@@ -1090,6 +1090,13 @@ mark_bivs (struct ivopts_data *data)
     continue;

       var = PHI_ARG_DEF_FROM_EDGE (phi, loop_latch_edge (loop));
+      def = SSA_NAME_DEF_STMT (var);
+      /* Don't mark iv peeled from other one as biv.  */
+      if (def
+      && gimple_code (def) == GIMPLE_PHI
+      && gimple_bb (def) == loop->header)
+    continue;
+
       incr_iv = get_iv (data, var);
       if (!incr_iv)
     continue;

PS, the example code can be optimized with fixed version patch by recognizing
more address ivs.  I attached the generated assembly code for arm cortex-m3.