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From: "zhenqiang.chen at arm dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/59535] [4.9 regression] -Os code size regressions for Thumb1/Thumb2 with LRA
Date: Wed, 03 Sep 2014 06:17:00 -0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: rtl-optimization
X-Bugzilla-Version: 4.9.0
X-Bugzilla-Keywords: missed-optimization, ra
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X-Bugzilla-Who: zhenqiang.chen at arm dot com
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59535

Zhenqiang Chen <zhenqiang.chen at arm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |zhenqiang.chen at arm dot com

--- Comment #20 from Zhenqiang Chen <zhenqiang.chen at arm dot com> ---
Here is a small case to show lra introduces one more register copy (tested with
trunk and 4.9).

int isascii (int c)
{
  return c >= 0 && c < 128;
}
With options: -Os -mthumb -mcpu=cortex-m0, I got

isascii:
    mov    r3, #0
    mov    r2, #127
    mov    r1, r3   //???
    cmp    r2, r0
    adc    r1, r1, r3
    mov    r0, r1
    bx    lr

With options: -Os -mthumb -mcpu=cortex-m0 -mno-lra, I got

isascii:
    mov    r2, #127
    mov    r3, #0
    cmp    r2, r0
    adc    r3, r3, r3
    mov    r0, r3
    bx    lr