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From: "terry.guo at arm dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/59826] ICE caused by mishandling PLD rtx on ARM cortex-m4 target Date: Thu, 16 Jan 2014 04:10:00 -0000 [thread overview] Message-ID: <bug-59826-4-Lglyd5oUJ9@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-59826-4@http.gcc.gnu.org/bugzilla/> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59826 --- Comment #1 from Terry Guo <terry.guo at arm dot com> --- As discussed in http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00875.html, the root cause should be incorrect insn type of preload instruction. 4.8 assigns alu type attribute to preload insn which causes other optimization passes think it can cause data dependence between alu->load/store. The trunk gcc with patch http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00322.html, correctly assign load1 insn type to preload instruction, which avoids the check of data dependence between alu->load/store, thereby no such issue. So the best way to fix this issue in 4.8 is to back port the patch to assign the proper insn type attribute.
prev parent reply other threads:[~2014-01-16 4:10 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-01-15 12:16 [Bug target/59826] New: " terry.guo at arm dot com 2014-01-16 4:10 ` terry.guo at arm dot com [this message]
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