[Bug target/59968] Unused BT patterns

["ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59968

--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to H.J. Lu from comment #0)
> There are some BT patterns in i386 guarded with
> TARGET_USE_BT.  But there are no testcases to show
> if they are used at all.

testsuite/gcc.target/i386/bt-*.c

> Also BT instructions supports memory destination.
> But BT patterns only allow register destination.

bt with a memory operand is slow. The bitpos argument is not limited to operand
size, and is primarily used for locked memory access.

BTW:

$ objdump -d cc1 | grep "bt " | wc -l
1228
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From: "hjl at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/59672] Add -m16 support for x86
Date: Tue, 28 Jan 2014 16:23:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY672

--- Comment #8 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> ---
Author: hjl
Date: Tue Jan 28 16:22:45 2014
New Revision: 207196

URL: http://gcc.gnu.org/viewcvs?rev 7196&root=gcc&view=rev
Log:
Add -m16 support for x86

The .code16gcc directive was added to binutils back in 1999:

---
   '.code16gcc' provides experimental support for generating 16-bit code
from gcc, and differs from '.code16' in that 'call', 'ret', 'enter',
'leave', 'push', 'pop', 'pusha', 'popa', 'pushf', and 'popf'
instructions default to 32-bit size.  This is so that the stack pointer
is manipulated in the same way over function calls, allowing access to
function parameters at the same stack offsets as in 32-bit mode.
'.code16gcc' also automatically adds address size prefixes where
necessary to use the 32-bit addressing modes that gcc generates.
---

It encodes 32-bit assembly instructions generated by GCC in 16-bit format
so that GCC can be used to generate 16-bit instructions.  To do that, the
.code16gcc directive must be placed at the very beginning of the assembly
code.  This patch adds -m16 to x86 backend by:

1. Add -m16 and make it mutually exclusive with -m32, -m64 and -mx32.
2. Treat -m16 like -m32 so that --32 is passed to assembler.
3. Output .code16gcc at the very beginning of the assembly code.
4. Turn off 64-bit ISA when -m16 is used.

    PR target/59672
    * config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32".
    (SPEC_X32): Likewise.
    (SPEC_64): Likewise.
    * config/i386/i386.c (ix86_option_override_internal): Turn off
    OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64
    for TARGET_16BIT.
    (x86_file_start): Output .code16gcc for TARGET_16BIT.
    * config/i386/i386.h (TARGET_16BIT): New macro.
    (TARGET_16BIT_P): Likewise.
    * config/i386/i386.opt: Add m16.
    * doc/invoke.texi: Document -m16.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/gnu-user64.h
    trunk/gcc/config/i386/i386.c
    trunk/gcc/config/i386/i386.h
    trunk/gcc/config/i386/i386.opt
    trunk/gcc/doc/invoke.texi