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* [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM.
@ 2014-02-12 22:08 ramana at gcc dot gnu.org
  2014-02-12 22:46 ` [Bug rtl-optimization/60162] [4.9 lra regression] mlra appears to be using the FP registers for integer values and then moving on to GPR registers pinskia at gcc dot gnu.org
                   ` (9 more replies)
  0 siblings, 10 replies; 11+ messages in thread
From: ramana at gcc dot gnu.org @ 2014-02-12 22:08 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

            Bug ID: 60162
           Summary: [4.9 lra regression] mlra appears to be using the FP
                    registers as a set of spill registers for ARM.
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ramana at gcc dot gnu.org

This is something that I've just noticed with spec2k gzip : longest_match. 

If the function is compiled for a cross arm-none-linux-gnueabihf toolchain with
the following parameters, 

--with-arch=armv7-a --with-fpu=neon --with-float=hard

With a cross toolchain using mlra by default I get code that loads a value into
an FP register and then moves this over to an integer register. While this is
not that big a problem on some of the newer cores, it will be an issue on older
cores where the latency of such transfers can be pretty high.

You can experiment with -mno-lra to see the difference in code generated and
this is essentially something that has shown up rather recently. 

Bisecting and will follow up in the morning with a testcase.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 lra regression] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
@ 2014-02-12 22:46 ` pinskia at gcc dot gnu.org
  2014-02-13  9:22 ` [Bug rtl-optimization/60162] [4.9 Regression][lra] " rguenth at gcc dot gnu.org
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: pinskia at gcc dot gnu.org @ 2014-02-12 22:46 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|middle-end                  |rtl-optimization

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
This sounds like the cost model of moving between register classes is not
correct for the arm backend.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
  2014-02-12 22:46 ` [Bug rtl-optimization/60162] [4.9 lra regression] mlra appears to be using the FP registers for integer values and then moving on to GPR registers pinskia at gcc dot gnu.org
@ 2014-02-13  9:22 ` rguenth at gcc dot gnu.org
  2014-02-13 10:26 ` ramana at gcc dot gnu.org
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2014-02-13  9:22 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.9.0
            Summary|[4.9 lra regression] mlra   |[4.9 Regression][lra] mlra
                   |appears to be using the FP  |appears to be using the FP
                   |registers for integer       |registers for integer
                   |values and then moving on   |values and then moving on
                   |to GPR registers.           |to GPR registers.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
  2014-02-12 22:46 ` [Bug rtl-optimization/60162] [4.9 lra regression] mlra appears to be using the FP registers for integer values and then moving on to GPR registers pinskia at gcc dot gnu.org
  2014-02-13  9:22 ` [Bug rtl-optimization/60162] [4.9 Regression][lra] " rguenth at gcc dot gnu.org
@ 2014-02-13 10:26 ` ramana at gcc dot gnu.org
  2014-02-13 12:10 ` ktkachov at gcc dot gnu.org
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: ramana at gcc dot gnu.org @ 2014-02-13 10:26 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

--- Comment #2 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
Created attachment 32120
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32120&action=edit
Reduced from gzip.

Command line options. 

-march=armv7-a -mfpu=neon -mfloat-abi=hard -mthumb -O3 -mlra


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (2 preceding siblings ...)
  2014-02-13 10:26 ` ramana at gcc dot gnu.org
@ 2014-02-13 12:10 ` ktkachov at gcc dot gnu.org
  2014-03-06 21:30 ` vmakarov at gcc dot gnu.org
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2014-02-13 12:10 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2014-02-13
                 CC|                            |ktkachov at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #3 from ktkachov at gcc dot gnu.org ---
I remember noticing weird loads to VFP regs when investigating PR59913 and
looking at the assembly output of genattrtab. That was at least as far back as
r206958.

pinskia: Playing with the TARGET_REGISTER_MOVE_COST hook in arm did not make a
difference, even when I set the move between GPR and VFP regs to ridiculously
high numbers


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (3 preceding siblings ...)
  2014-02-13 12:10 ` ktkachov at gcc dot gnu.org
@ 2014-03-06 21:30 ` vmakarov at gcc dot gnu.org
  2014-03-31  9:24 ` rguenth at gcc dot gnu.org
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: vmakarov at gcc dot gnu.org @ 2014-03-06 21:30 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

--- Comment #4 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Ramana Radhakrishnan from comment #2)
> Created attachment 32120 [details]
> Reduced from gzip.
> 
> Command line options. 
> 
> -march=armv7-a -mfpu=neon -mfloat-abi=hard -mthumb -O3 -mlra

Sorry, I've tried the reduced test with the above option and was not able to
reproduce the problem.  The code is different but I don't see usage of FP regs.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (4 preceding siblings ...)
  2014-03-06 21:30 ` vmakarov at gcc dot gnu.org
@ 2014-03-31  9:24 ` rguenth at gcc dot gnu.org
  2014-04-22 11:35 ` [Bug rtl-optimization/60162] [4.9/4.10 " jakub at gcc dot gnu.org
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2014-03-31  9:24 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization
             Status|NEW                         |WAITING

--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
WAITING, as of last comment.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9/4.10 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (5 preceding siblings ...)
  2014-03-31  9:24 ` rguenth at gcc dot gnu.org
@ 2014-04-22 11:35 ` jakub at gcc dot gnu.org
  2014-07-16 13:27 ` jakub at gcc dot gnu.org
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: jakub at gcc dot gnu.org @ 2014-04-22 11:35 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.9.0                       |4.9.1

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 4.9.0 has been released


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9/4.10 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (6 preceding siblings ...)
  2014-04-22 11:35 ` [Bug rtl-optimization/60162] [4.9/4.10 " jakub at gcc dot gnu.org
@ 2014-07-16 13:27 ` jakub at gcc dot gnu.org
  2014-10-30 10:38 ` [Bug rtl-optimization/60162] [4.9/5 " jakub at gcc dot gnu.org
  2015-01-16 15:46 ` ramana at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: jakub at gcc dot gnu.org @ 2014-07-16 13:27 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.9.1                       |4.9.2

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 4.9.1 has been released.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9/5 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (7 preceding siblings ...)
  2014-07-16 13:27 ` jakub at gcc dot gnu.org
@ 2014-10-30 10:38 ` jakub at gcc dot gnu.org
  2015-01-16 15:46 ` ramana at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: jakub at gcc dot gnu.org @ 2014-10-30 10:38 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.9.2                       |4.9.3

--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 4.9.2 has been released.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug rtl-optimization/60162] [4.9/5 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.
  2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
                   ` (8 preceding siblings ...)
  2014-10-30 10:38 ` [Bug rtl-optimization/60162] [4.9/5 " jakub at gcc dot gnu.org
@ 2015-01-16 15:46 ` ramana at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: ramana at gcc dot gnu.org @ 2015-01-16 15:46 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|WAITING                     |RESOLVED
         Resolution|---                         |INVALID

--- Comment #9 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
Not sure what's going on here, as I'm unable to reproduce this now.


^ permalink raw reply	[flat|nested] 11+ messages in thread

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2014-02-12 22:08 [Bug middle-end/60162] New: [4.9 lra regression] mlra appears to be using the FP registers as a set of spill registers for ARM ramana at gcc dot gnu.org
2014-02-12 22:46 ` [Bug rtl-optimization/60162] [4.9 lra regression] mlra appears to be using the FP registers for integer values and then moving on to GPR registers pinskia at gcc dot gnu.org
2014-02-13  9:22 ` [Bug rtl-optimization/60162] [4.9 Regression][lra] " rguenth at gcc dot gnu.org
2014-02-13 10:26 ` ramana at gcc dot gnu.org
2014-02-13 12:10 ` ktkachov at gcc dot gnu.org
2014-03-06 21:30 ` vmakarov at gcc dot gnu.org
2014-03-31  9:24 ` rguenth at gcc dot gnu.org
2014-04-22 11:35 ` [Bug rtl-optimization/60162] [4.9/4.10 " jakub at gcc dot gnu.org
2014-07-16 13:27 ` jakub at gcc dot gnu.org
2014-10-30 10:38 ` [Bug rtl-optimization/60162] [4.9/5 " jakub at gcc dot gnu.org
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