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From: "manjian2006 at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/60281] New: Address Sanitizer triggers alignment fault in ARM machines
Date: Thu, 20 Feb 2014 08:07:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60281

            Bug ID: 60281
           Summary: Address Sanitizer triggers alignment fault in ARM
                    machines
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: manjian2006 at gmail dot com

Without aligning the asan stack base,this base will only 64-bit aligned in ARM
machines.
But asan require 256-bit aligned base because of this:
1.right shift take ASAN_SHADOW_SHIFT ,which is 3,bits are zeros
2.store multiple/load multiple instructions require the other 2 bits are zeros

that add up lowest 5 bits should be zeros.That means 32 bytes or 256 bits
aligned.

Here is the test case:

#include <time.h>

int foo()
{
    struct timespec timeNow1 ;
    clock_gettime( 0, &timeNow1);
    return static_cast<double>(timeNow1.tv_sec);
}

compiles command:
arm-linux-androideabi-g++ -march=armv7-a -mthumb   -Os -fsanitize=address  -S
1.cpp
which generates assembly as:
    push    {r4, r5, r6, r7, lr} @ save 5*4 = 20 bytes
    sub    sp, sp, #100         @ save 20 + 100 = 120 bytes 
        ...
    mov    r4, sp
        ...
    lsrs    r5, r4, #3           @ as -120 is 11111111111111111111111110001000
r5 is aligned to 1 bits
        ...
    stmia    r5, {r1, r2, r3}     @  trigger alignment fault