[Bug target/60735] New: GCC targeting E500 with SPE has errors with the _Decimal64 type

[Bug target/60735] New: GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

            Bug ID: 60735
           Summary: GCC targeting E500 with SPE has errors with the
                    _Decimal64 type
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: meissner at gcc dot gnu.org

Created attachment 32519
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32519&action=edit
Example program, fails with -O3 on a powerpc-linuxspe target.

In my October 17th, 2013 changes to clean up the powerpc addressing issues, I
broke the use of DDmode (_Decimal64) on SPE systems.  This shows up in building
libgcc.  The issue is none of the moves of DDmode worked in the case where the
system had SPE double floating point, which puts double precision values in
GPRs.  However, the DDmode is not handled in the same fashion, and it fell
through the cracks.

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Michael Meissner <meissner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|                            |powerpc-linuxspe
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2014-04-01
                 CC|                            |bergner at gcc dot gnu.org,
                   |                            |dje at gcc dot gnu.org,
                   |                            |pthaugen at gcc dot gnu.org,
                   |                            |wschmidt at gcc dot gnu.org
           Assignee|unassigned at gcc dot gnu.org      |meissner at gcc dot gnu.org
     Ever confirmed|0                           |1

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #1 from Michael Meissner <meissner at gcc dot gnu.org> ---
Created attachment 32520
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32520&action=edit
Proposed patch to fix the problem

The issue is there was no insn to support movdd if -mspe.  I fixed the code to
provide the insn for 32-bit moves.  In looking at the code, there were some
thinkos in that the moves for DFmode and DDmode where testing
TARGET_SINGLE_FLOAT and TARGET_E500_SINGLE, when these types are double.  In
addition, I disabled the FPRs being considered available if software floating
point or floating point is not done in FPRS (i.e. spe).

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #2 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Wed Apr  2 17:03:49 2014
New Revision: 209025

URL: http://gcc.gnu.org/viewcvs?rev=209025&root=gcc&view=rev
Log:
2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.c
    trunk/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Michael Meissner <meissner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from Michael Meissner <meissner at gcc dot gnu.org> ---
Fixed in subversion id 209025.

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #4 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Wed Apr  2 17:16:33 2014
New Revision: 209026

URL: http://gcc.gnu.org/viewcvs?rev=209026&root=gcc&view=rev
Log:
2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #5 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Author: wschmidt
Date: Fri Apr  4 15:14:01 2014
New Revision: 209116

URL: http://gcc.gnu.org/viewcvs?rev=209116&root=gcc&view=rev
Log:
[gcc]

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Bill Schmidt <wschmidt at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P1
            Version|4.9.0                       |4.8.3

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Bill Schmidt <wschmidt at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|FIXED                       |---

--- Comment #6 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
This fix caused breakage on RTEMS as well as on e500 v2, as noted in PR60839
and private mail.  After discussions with the maintainers, I am reverting the
fix today in 4.8, 4.9, and 4.10.  This needs to be re-fixed prior to 4.8.3
releasing, so marking as a P1 for 4.8.

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #7 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Author: wschmidt
Date: Tue Apr 15 18:20:01 2014
New Revision: 209425

URL: http://gcc.gnu.org/viewcvs?rev=209425&root=gcc&view=rev
Log:
2014-04-15  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    PR target/60839
    Revert following patch

    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.c
    trunk/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #8 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Author: wschmidt
Date: Tue Apr 15 18:25:09 2014
New Revision: 209426

URL: http://gcc.gnu.org/viewcvs?rev=209426&root=gcc&view=rev
Log:
2014-04-15  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    PR target/60839
    Revert the following patch

    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    branches/gcc-4_9-branch/gcc/ChangeLog
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #9 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Author: wschmidt
Date: Tue Apr 15 18:30:21 2014
New Revision: 209430

URL: http://gcc.gnu.org/viewcvs?rev=209430&root=gcc&view=rev
Log:
2014-04-15  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    PR target/60839
    Revert the following patch

    2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
    Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
    since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
    specifically allow DDmode, since that does not use the SPE SIMD
    instructions.


Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.md

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Michael Meissner <meissner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #32520|0                           |1
        is obsolete|                            |

--- Comment #10 from Michael Meissner <meissner at gcc dot gnu.org> ---
Created attachment 32625
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32625&action=edit
Patch to fix problem (replacement for first patch)

This patch just fixes the specific problem on the SPE.

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #11 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Mon Apr 21 20:51:37 2014
New Revision: 209546

URL: http://gcc.gnu.org/viewcvs?rev=209546&root=gcc&view=rev
Log:
[gcc]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
    If mode is DDmode and TARGET_E500_DOUBLE allow move.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
    more debug information for E500 if -mdebug=reg.

[gcc/testsuite]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * gcc.target/powerpc/pr60735.c: New test.  Insure _Decimal64 does
    not cause errors if -mspe.


Added:
    trunk/gcc/testsuite/gcc.target/powerpc/pr60735.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.c
    trunk/gcc/config/rs6000/rs6000.md
    trunk/gcc/testsuite/ChangeLog

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #12 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Mon Apr 21 22:03:51 2014
New Revision: 209547

URL: http://gcc.gnu.org/viewcvs?rev=209547&root=gcc&view=rev
Log:
[gcc]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
    If mode is DDmode and TARGET_E500_DOUBLE allow move.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
    more debug information for E500 if -mdebug=reg.

[gcc/testsuite]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * gcc.target/powerpc/pr60735.c: New test.  Insure _Decimal64 does
    not cause errors if -mspe.


Added:
    branches/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/pr60735.c
      - copied unchanged from r209546,
trunk/gcc/testsuite/gcc.target/powerpc/pr60735.c
Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.md
    branches/gcc-4_8-branch/gcc/testsuite/ChangeLog

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[meissner at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #13 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Tue Apr 22 23:33:14 2014
New Revision: 209664

URL: http://gcc.gnu.org/viewcvs?rev=209664&root=gcc&view=rev
Log:
[gcc]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
    If mode is DDmode and TARGET_E500_DOUBLE allow move.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
    more debug information for E500 if -mdebug=reg.

[gcc/testsuite]
2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * gcc.target/powerpc/pr60735.c: New test.  Insure _Decimal64 does
    not cause errors if -mspe.


Added:
    branches/gcc-4_9-branch/gcc/testsuite/gcc.target/powerpc/pr60735.c
      - copied unchanged from r209549,
trunk/gcc/testsuite/gcc.target/powerpc/pr60735.c
Modified:
    branches/gcc-4_9-branch/gcc/ChangeLog
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.md
    branches/gcc-4_9-branch/gcc/testsuite/ChangeLog

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[wschmidt at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

Bill Schmidt <wschmidt at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|REOPENED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #14 from Bill Schmidt <wschmidt at gcc dot gnu.org> ---
Looks like fixes are in place for all releases now.

[Bug target/60735] GCC targeting E500 with SPE has errors with the _Decimal64 type

[bergner at gcc dot gnu.org]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="UTF-8", Size: 21976 bytes --]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735

--- Comment #15 from Peter Bergner <bergner at gcc dot gnu.org> ---
Author: bergner
Date: Mon May 12 23:08:22 2014
New Revision: 210344

URL: http://gcc.gnu.org/viewcvs?rev=210344&root=gcc&view=rev
Log:
    Reapply the old IBM 4.8 branch patches that are not upstream.

gcc/
    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    Back port from main line:
    2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

    * config/rs6000/constraints.md (wD constraint): New constraint to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/predicates.md (vsx_scalar_64bit): New predicate to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): If
    -mdebug=reg, print value of VECTOR_ELEMENT_SCALAR_64BIT.

    * config/rs6000/rs6000.h (VECTOR_ELEMENT_SCALAR_64BIT): Macro to
    define the top 64-bit vector element.

    * config/rs6000/vsx.md (vsx_extract_<mode>, V2DI/V2DF modes):
    Optimize vec_extract of 64-bit values, where the value being
    extracted is in the top word, where we can use scalar
    instructions.  Add direct move and store support.  Combine the big
    endian/little endian vector select load support into a single insn.
    (vsx_extract_<mode>_internal1): Likewise.
    (vsx_extract_<mode>_internal2): Likewise.
    (vsx_extract_<mode>_load): Likewise.
    (vsx_extract_<mode>_store): Likewise.
    (vsx_extract_<mode>_zero): Delete, big and little endian insns are
    combined into vsx_extract_<mode>_load.
    (vsx_extract_<mode>_one_le): Likewise.

    * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wD
    constraint.

    * gcc.target/powerpc/vsx-extract-1.c: New test to test VSX
    vec_select optimizations.
    * gcc.target/powerpc/vsx-extract-2.c: Likewise.
    * gcc.target/powerpc/vsx-extract-3.c: Likewise.

    PR target/60672
    * gcc.target/powerpc/pr60676.c: New file, make sure xxsldwi and
    xxpermdi builtins are supported.

    Backport from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * include/tr1/cmath: Remove pow(double,double) overload, remove a
    duplicated comment about DR 550. Add a comment to explain the issue.
    * testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc: New.

gcc/testsuite/

    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>
            Peter Bergner  <bergner@vnet.ibm.com>

    PR c++/54537
    * g++.dg/overload/using3.C: New.
    * g++.dg/overload/using2.C: Adjust.
    * g++.dg/lookup/using9.C: Likewise.

gcc/cp/
    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * cp-tree.h: Check OVL_USED with OVERLOAD_CHECK.
    * name-lookup.c (do_nonmember_using_decl): Make sure we have an
    OVERLOAD before calling OVL_USED. Call diagnose_name_conflict
    instead of issuing an error without mentioning the conflicting
    declaration.

libgcc/
    * config/rs6000/ibm-ldouble.c (pack_ldouble): New function.
    (__gcc_qadd): Use it.
    (__gcc_qmul): Likewise.
    (__gcc_qdiv): Likewise.
    (__gcc_qneg): Likewise.
    (__gcc_stoq): Likewise.
    (__gcc_dtoq): Likewise.


Added:
    branches/ibm/gcc-4_8-branch/gcc/cp/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using3.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/pr60676.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c
    branches/ibm/gcc-4_8-branch/libgcc/ChangeLog.ibm
   
branches/ibm/gcc-4_8-branch/libstdc++-v3/testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc
Modified:
    branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/constraints.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/predicates.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.h
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/vsx.md
    branches/ibm/gcc-4_8-branch/gcc/cp/cp-tree.h
    branches/ibm/gcc-4_8-branch/gcc/cp/name-lookup.c
    branches/ibm/gcc-4_8-branch/gcc/doc/md.texi
    branches/ibm/gcc-4_8-branch/gcc/testsuite/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/lookup/using9.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using2.C
    branches/ibm/gcc-4_8-branch/libgcc/config/rs6000/ibm-ldouble.c
    branches/ibm/gcc-4_8-branch/libstdc++-v3/include/tr1/cmath
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Subject: [Bug c++/54537] undiagnosed using-declaration conflicting with used function
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54537

--- Comment #4 from Peter Bergner <bergner at gcc dot gnu.org> ---
Author: bergner
Date: Mon May 12 23:08:22 2014
New Revision: 210344

URL: http://gcc.gnu.org/viewcvs?rev=210344&root=gcc&view=rev
Log:
    Reapply the old IBM 4.8 branch patches that are not upstream.

gcc/
    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    Back port from main line:
    2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

    * config/rs6000/constraints.md (wD constraint): New constraint to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/predicates.md (vsx_scalar_64bit): New predicate to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): If
    -mdebug=reg, print value of VECTOR_ELEMENT_SCALAR_64BIT.

    * config/rs6000/rs6000.h (VECTOR_ELEMENT_SCALAR_64BIT): Macro to
    define the top 64-bit vector element.

    * config/rs6000/vsx.md (vsx_extract_<mode>, V2DI/V2DF modes):
    Optimize vec_extract of 64-bit values, where the value being
    extracted is in the top word, where we can use scalar
    instructions.  Add direct move and store support.  Combine the big
    endian/little endian vector select load support into a single insn.
    (vsx_extract_<mode>_internal1): Likewise.
    (vsx_extract_<mode>_internal2): Likewise.
    (vsx_extract_<mode>_load): Likewise.
    (vsx_extract_<mode>_store): Likewise.
    (vsx_extract_<mode>_zero): Delete, big and little endian insns are
    combined into vsx_extract_<mode>_load.
    (vsx_extract_<mode>_one_le): Likewise.

    * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wD
    constraint.

    * gcc.target/powerpc/vsx-extract-1.c: New test to test VSX
    vec_select optimizations.
    * gcc.target/powerpc/vsx-extract-2.c: Likewise.
    * gcc.target/powerpc/vsx-extract-3.c: Likewise.

    PR target/60672
    * gcc.target/powerpc/pr60676.c: New file, make sure xxsldwi and
    xxpermdi builtins are supported.

    Backport from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * include/tr1/cmath: Remove pow(double,double) overload, remove a
    duplicated comment about DR 550. Add a comment to explain the issue.
    * testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc: New.

gcc/testsuite/

    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>
            Peter Bergner  <bergner@vnet.ibm.com>

    PR c++/54537
    * g++.dg/overload/using3.C: New.
    * g++.dg/overload/using2.C: Adjust.
    * g++.dg/lookup/using9.C: Likewise.

gcc/cp/
    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * cp-tree.h: Check OVL_USED with OVERLOAD_CHECK.
    * name-lookup.c (do_nonmember_using_decl): Make sure we have an
    OVERLOAD before calling OVL_USED. Call diagnose_name_conflict
    instead of issuing an error without mentioning the conflicting
    declaration.

libgcc/
    * config/rs6000/ibm-ldouble.c (pack_ldouble): New function.
    (__gcc_qadd): Use it.
    (__gcc_qmul): Likewise.
    (__gcc_qdiv): Likewise.
    (__gcc_qneg): Likewise.
    (__gcc_stoq): Likewise.
    (__gcc_dtoq): Likewise.


Added:
    branches/ibm/gcc-4_8-branch/gcc/cp/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using3.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/pr60676.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c
    branches/ibm/gcc-4_8-branch/libgcc/ChangeLog.ibm
   
branches/ibm/gcc-4_8-branch/libstdc++-v3/testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc
Modified:
    branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/constraints.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/predicates.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.h
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/vsx.md
    branches/ibm/gcc-4_8-branch/gcc/cp/cp-tree.h
    branches/ibm/gcc-4_8-branch/gcc/cp/name-lookup.c
    branches/ibm/gcc-4_8-branch/gcc/doc/md.texi
    branches/ibm/gcc-4_8-branch/gcc/testsuite/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/lookup/using9.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using2.C
    branches/ibm/gcc-4_8-branch/libgcc/config/rs6000/ibm-ldouble.c
    branches/ibm/gcc-4_8-branch/libstdc++-v3/include/tr1/cmath
>From gcc-bugs-return-451385-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Mon May 12 23:09:04 2014
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60672

--- Comment #7 from Peter Bergner <bergner at gcc dot gnu.org> ---
Author: bergner
Date: Mon May 12 23:08:22 2014
New Revision: 210344

URL: http://gcc.gnu.org/viewcvs?rev=210344&root=gcc&view=rev
Log:
    Reapply the old IBM 4.8 branch patches that are not upstream.

gcc/
    Back port mainline subversion id 209025.
    2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/60735
    * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
    software floating point or no floating point registers, do not
    allow any type in the FPRs.  Eliminate a test for SPE SIMD types
    in GPRs that occurs after we tested for GPRs that would never be
    true.

    Back port from main line:
    2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

    * config/rs6000/constraints.md (wD constraint): New constraint to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/predicates.md (vsx_scalar_64bit): New predicate to
    match the constant integer to get the top DImode/DFmode out of a
    vector in a VSX register.

    * config/rs6000/rs6000.c (rs6000_debug_reg_global): If
    -mdebug=reg, print value of VECTOR_ELEMENT_SCALAR_64BIT.

    * config/rs6000/rs6000.h (VECTOR_ELEMENT_SCALAR_64BIT): Macro to
    define the top 64-bit vector element.

    * config/rs6000/vsx.md (vsx_extract_<mode>, V2DI/V2DF modes):
    Optimize vec_extract of 64-bit values, where the value being
    extracted is in the top word, where we can use scalar
    instructions.  Add direct move and store support.  Combine the big
    endian/little endian vector select load support into a single insn.
    (vsx_extract_<mode>_internal1): Likewise.
    (vsx_extract_<mode>_internal2): Likewise.
    (vsx_extract_<mode>_load): Likewise.
    (vsx_extract_<mode>_store): Likewise.
    (vsx_extract_<mode>_zero): Delete, big and little endian insns are
    combined into vsx_extract_<mode>_load.
    (vsx_extract_<mode>_one_le): Likewise.

    * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wD
    constraint.

    * gcc.target/powerpc/vsx-extract-1.c: New test to test VSX
    vec_select optimizations.
    * gcc.target/powerpc/vsx-extract-2.c: Likewise.
    * gcc.target/powerpc/vsx-extract-3.c: Likewise.

    PR target/60672
    * gcc.target/powerpc/pr60676.c: New file, make sure xxsldwi and
    xxpermdi builtins are supported.

    Backport from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * include/tr1/cmath: Remove pow(double,double) overload, remove a
    duplicated comment about DR 550. Add a comment to explain the issue.
    * testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc: New.

gcc/testsuite/

    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>
            Peter Bergner  <bergner@vnet.ibm.com>

    PR c++/54537
    * g++.dg/overload/using3.C: New.
    * g++.dg/overload/using2.C: Adjust.
    * g++.dg/lookup/using9.C: Likewise.

gcc/cp/
    Back port from mainline
    2013-08-01  Fabien Chêne  <fabien@gcc.gnu.org>

    PR c++/54537
    * cp-tree.h: Check OVL_USED with OVERLOAD_CHECK.
    * name-lookup.c (do_nonmember_using_decl): Make sure we have an
    OVERLOAD before calling OVL_USED. Call diagnose_name_conflict
    instead of issuing an error without mentioning the conflicting
    declaration.

libgcc/
    * config/rs6000/ibm-ldouble.c (pack_ldouble): New function.
    (__gcc_qadd): Use it.
    (__gcc_qmul): Likewise.
    (__gcc_qdiv): Likewise.
    (__gcc_qneg): Likewise.
    (__gcc_stoq): Likewise.
    (__gcc_dtoq): Likewise.


Added:
    branches/ibm/gcc-4_8-branch/gcc/cp/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using3.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/pr60676.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c
   
branches/ibm/gcc-4_8-branch/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c
    branches/ibm/gcc-4_8-branch/libgcc/ChangeLog.ibm
   
branches/ibm/gcc-4_8-branch/libstdc++-v3/testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc
Modified:
    branches/ibm/gcc-4_8-branch/gcc/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/constraints.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/predicates.md
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/rs6000.h
    branches/ibm/gcc-4_8-branch/gcc/config/rs6000/vsx.md
    branches/ibm/gcc-4_8-branch/gcc/cp/cp-tree.h
    branches/ibm/gcc-4_8-branch/gcc/cp/name-lookup.c
    branches/ibm/gcc-4_8-branch/gcc/doc/md.texi
    branches/ibm/gcc-4_8-branch/gcc/testsuite/ChangeLog.ibm
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/lookup/using9.C
    branches/ibm/gcc-4_8-branch/gcc/testsuite/g++.dg/overload/using2.C
    branches/ibm/gcc-4_8-branch/libgcc/config/rs6000/ibm-ldouble.c
    branches/ibm/gcc-4_8-branch/libstdc++-v3/include/tr1/cmath
>From gcc-bugs-return-451386-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Mon May 12 23:27:12 2014
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Subject: [Bug c++/61038] g++ -E is unusable with UDL strings
Date: Mon, 12 May 2014 23:27:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?ida038

emsr at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #32783|0                           |1
        is obsolete|                            |

--- Comment #10 from emsr at gcc dot gnu.org ---
Created attachment 32787
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id2787&actioníit
In libcpp, is stringify_arg, test for user-defined literal strings and literal
chars.


libcpp/

2014-05-12  Edward Smith-Rowland  <3dw4rd@verizon.net>

    PR c++/61038
    * module.c (stringify_arg (cpp_reader *, macro_arg *)):
    Check for user-defined literal strings and user-defined literal chars
    to escape necessary characters.