From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3174 invoked by alias); 12 May 2014 13:10:20 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 3078 invoked by uid 48); 12 May 2014 13:10:15 -0000 From: "ramana at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/61153] [ARM] vbic vorn tests fail Date: Mon, 12 May 2014 13:10:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 4.10.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: ramana at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2014-05/txt/msg01014.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=61153 Ramana Radhakrishnan changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- > Since commit 210216 "Neon intrinsics TLC - Replace intrinsics with GNU C > implementations", I have noticed regressions in the following tests: > gcc.target/arm/neon/vbicQs16.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQs32.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQs64.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQs8.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQu16.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQu32.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQu64.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicQu8.c scan-assembler vbic[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbics16.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbics32.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbics8.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicu16.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicu32.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vbicu8.c scan-assembler vbic[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQs16.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQs32.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQs64.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQs8.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQu16.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQu32.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQu64.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornQu8.c scan-assembler vorn[ \t]+[qQ][0-9]+, > [qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vorns16.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vorns32.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vorns8.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornu16.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornu32.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n > gcc.target/arm/neon/vornu8.c scan-assembler vorn[ \t]+[dD][0-9]+, > [dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n Yes that is expected as per my original patch submission. Patch 1/3 said these tests would fail because at O0 combine doesn't run. I'm expecting your run time tests to go in and for cases where we need them, we may want to put out some kind of basic scan assembler tests for them. I'm tempted to mark this as invalid. > > with many --with-target/--with-cpu/--with-fpu configurations as can be seen > on > http://cbuild.validation.linaro.org/build/cross-validation/gcc/210216/report- > build-info.html