From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D6A87395184D; Thu, 20 May 2021 13:25:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D6A87395184D From: "dave.anglin at bell dot net" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/61577] [4.9.0 Regression] can't compile on hp-ux v3 ia64 Date: Thu, 20 May 2021 13:25:10 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 4.9.0 X-Bugzilla-Keywords: build X-Bugzilla-Severity: major X-Bugzilla-Who: dave.anglin at bell dot net X-Bugzilla-Status: WAITING X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 May 2021 13:25:10 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D61577 --- Comment #218 from dave.anglin at bell dot net --- On 2021-05-20 5:19 a.m., jvb at cyberscience dot com wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D61577 > > --- Comment #217 from John Buddery --- > Thanks very much for adding the binutils patch. > > Sorry, I'm new to .md definitions, so I've probably got this wrong. Did y= ou > mean something like: > > (define_insn "call_nogp_longcall" > [(call (mem:DI (match_operand:DI 0 "call_operand" "?b,s")) > (const_int 0)) > (clobber (match_operand:DI 1 "register_operand" "=3Db,b"))] > "TARGET_HPUX && ia64_tune =3D=3D PROCESSOR_ITANIUM2" > "@ > br.call%+.many %1 =3D %0 > brl.call%+.many %1 =3D %0" > [(set_attr "itanium_class" "br,scall")]) > > (define_insn "call_nogp" > [(call (mem:DI (match_operand:DI 0 "call_operand" "?b,s")) > (const_int 0)) > (clobber (match_operand:DI 1 "register_operand" "=3Db,b"))] > "" > "br.call%+.many %1 =3D %0" > [(set_attr "itanium_class" "br,scall")]) > > I assume you need a second instruction to catch the case where the condit= ion > doesn't match ? Yes.=C2=A0 Note that the call_nogp pattern is output directly in a couple o= f places in ia64.c.=C2=A0 These will need adjustment for hpux. I'm not a ia64 maintainer.=C2=A0 I can only apply changes specific to hpux. I have limited knowledge of the ia64 instruction set.=C2=A0 In the above, t= he "brl.call" alternative apples to the "s" constraint for operand 0.=C2=A0 Is that what you want?=C2= =A0 The "br.call" form is used for the disparaged "b" constraint for operand 0. I'm not sure that the scall call attribute is correct for brl. > > Itanium 1 support seems to have been dropped at some point, so -mtune only > accepts options mapping to Itanium2. So, I couldn't test the br case on H= P. Then, we don't need to check the ia64_tune in the above.=