From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 25B643940CF0; Wed, 19 May 2021 16:23:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 25B643940CF0 From: "dave.anglin at bell dot net" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/61577] [4.9.0 Regression] can't compile on hp-ux v3 ia64 Date: Wed, 19 May 2021 16:23:43 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 4.9.0 X-Bugzilla-Keywords: build X-Bugzilla-Severity: major X-Bugzilla-Who: dave.anglin at bell dot net X-Bugzilla-Status: WAITING X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 May 2021 16:23:44 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D61577 --- Comment #216 from dave.anglin at bell dot net --- On 2021-05-17 5:56 a.m., jvb at cyberscience dot com wrote: > With the working as, I changed gcc to use brl instructions for calls, inc= luding > tail calls: > > --- gcc-11.1.0/gcc/config/ia64/ia64.md 2021-04-27 11:00:13.000000000 +01= 00 > +++ gcc-11.1.0-snake/gcc/config/ia64/ia64.md 2021-05-13 14:49:21.00000= 0000 > +0100 > @@ -4410,7 +4410,9 @@ > (const_int 0)) > (clobber (match_operand:DI 1 "register_operand" "=3Db,b"))] > "" > - "br.call%+.many %1 =3D %0" > + "@ > + br.call%+.many %1 =3D %0 > + brl.call%+.many %1 =3D %0" > [(set_attr "itanium_class" "br,scall")]) > > (define_insn "call_value_nogp" > @@ -4419,14 +4421,18 @@ > (const_int 0))) > (clobber (match_operand:DI 2 "register_operand" "=3Db,b"))] > "" > - "br.call%+.many %2 =3D %1" > + "@ > + br.call%+.many %2 =3D %1 > + brl.call%+.many %2 =3D %1" > [(set_attr "itanium_class" "br,scall")]) > > (define_insn "sibcall_nogp" > [(call (mem:DI (match_operand:DI 0 "call_operand" "?b,s")) > (const_int 0))] > "" > - "br%+.many %0" > + "@ > + br%+.many %0 > + brl%+.many %0" > [(set_attr "itanium_class" "br,scall")]) > > (define_insn "call_gp" We only should use brl when TARGET_HPUX and ia64_tune =3D=3D PROCESSOR_ITAN= IUM2.=C2=A0 I wouldn't worry too much about it being slightly less efficient.=C2=A0 You can use the pattern const= raint to implement this.=