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* [Bug rtl-optimization/61608] New: [4.10 regression] FAIL: gcc.target/arm/epilog-1.c scan-assembler tests
@ 2014-06-25 12:57 jgreenhalgh at gcc dot gnu.org
  2014-06-25 13:00 ` [Bug rtl-optimization/61608] " jgreenhalgh at gcc dot gnu.org
                   ` (7 more replies)
  0 siblings, 8 replies; 9+ messages in thread
From: jgreenhalgh at gcc dot gnu.org @ 2014-06-25 12:57 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61608

            Bug ID: 61608
           Summary: [4.10 regression] FAIL: gcc.target/arm/epilog-1.c
                    scan-assembler tests
           Product: gcc
           Version: 4.10.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jgreenhalgh at gcc dot gnu.org

Revision 211919 changes the position of the peephole2 pass causing a code-size
regression for ARM targets.

My compiler is configured with:

Target: arm-none-eabi
Configured with: /work/gcc-clean/src/gcc/configure --target=arm-none-eabi
--prefix=/work/gcc-clean/build-arm-none-eabi/install
--with-gmp=/work/gcc-clean/build-arm-none-eabi/host-tools
--with-mpfr=/work/gcc-clean/build-arm-none-eabi/host-tools
--with-mpc=/work/gcc-clean/build-arm-none-eabi/host-tools
--with-pkgversion=unknown --disable-shared --disable-nls --disable-threads
--disable-tls --enable-checking=yes --enable-languages=c,c++,fortran
--with-newlib --with-arch=armv8-a --with-float=hard
--with-fpu=crypto-neon-fp-armv8
Thread model: single
gcc version 4.10.0 20140624

---
Code generation Before:

foo:
    @ args = 0, pretend = 0, frame = 0
    @ frame_needed = 0, uses_anonymous_args = 0
    push    {r4, lr}
    ldr    r4, .L6
    ldr    r4, [r4]
    lsls    r4, r4, #29
    it    mi
    addmi    r2, r2, #1
    bl    bar
    movs    r0, #0
    pop    {r4, pc}
.
---
Code generation After:

foo:
    @ args = 0, pretend = 0, frame = 0
    @ frame_needed = 0, uses_anonymous_args = 0
    push    {r4, lr}
    ldr    r4, .L6
    ldr    r4, [r4]
    tst    r4, #4
    it    ne
    addne    r2, r2, #1
    bl    bar
    movs    r0, #0
    pop    {r4, pc}
---

The tst (immediate) instruction is a 4-byte thumb instruction, while lsls is a
2-byte thumb instruction.


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2014-08-06 14:40 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-06-25 12:57 [Bug rtl-optimization/61608] New: [4.10 regression] FAIL: gcc.target/arm/epilog-1.c scan-assembler tests jgreenhalgh at gcc dot gnu.org
2014-06-25 13:00 ` [Bug rtl-optimization/61608] " jgreenhalgh at gcc dot gnu.org
2014-06-25 13:05 ` ktietz at gcc dot gnu.org
2014-06-25 13:20 ` jgreenhalgh at gcc dot gnu.org
2014-06-25 13:27 ` ktietz at gcc dot gnu.org
2014-06-25 13:52 ` rguenth at gcc dot gnu.org
2014-06-25 13:53 ` rguenth at gcc dot gnu.org
2014-06-30 20:15 ` rth at gcc dot gnu.org
2014-08-06 14:40 ` jgreenhalgh at gcc dot gnu.org

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