[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64

["e.menezes at samsung dot com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915

--- Comment #11 from Evandro <e.menezes at samsung dot com> ---
(In reply to Wilco from comment #9)
> The performance cost is a much bigger issue than codesize. The problem is
> that when register pressure is high, the register allocator decides to
> allocate integer liveranges to FP registers and insert int<->fp moves for
> every use/define (ie. you end up with far more moves than you would if it
> were spilled, so it is a bad thing even if int<->fp moves are cheap).
> 
> I committed a workaround
> (http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00362.html) by increasing the
> int<->fp move cost. Can you try this and check the issue has indeed gone?
> You need -mcpu=cortex-a57.

I believe that it pretty much is, after a cursory examination.  The code size 
after the patch is back down about 2% for the test case above.  Of note, the
prolog and epilog are much smaller, because the FP registers don't have to be
saved and restored anymore, and the stack frame shrank correspondingly.

Do you have an idea of the performance impact of this patch?