[Bug target/61948] New: [ARM] [4.9 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[Bug target/61948] New: [ARM] [4.9 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[cbaylis at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

            Bug ID: 61948
           Summary: [ARM] [4.9 regression] ICE with DImode shift by 1 bit
                    (in copyprop_hardreg_forward_1)
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: cbaylis at gcc dot gnu.org
          Reporter: cbaylis at gcc dot gnu.org
            Target: arm-unknown-linux-gnueabihf

Created attachment 33202
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=33202&action=edit
Original test case, needs -std=c++11

Originally reported at:
https://bugs.linaro.org/show_bug.cgi?id=176

The lshrdi3_neon,ashrdi3_neon,ashldi3_neon patterns can call
gen_arm_<shift>di3_1bit without checking that the register allocation
constraints of the resulting insn are satisfied. This results in an ICE:

Simplified test case:
------<========
long long f (long long *c)
{
  long long t = c[0];
  /* force t into [r1,r2] */
  asm ("nop" : : : "r0", "r3", "r4", "r5",
                   "r6", "r7", "r8", "r9",
                   "r10", "r11", "r12", "memory");
  return t >> 1;
}
=======>-------

$ arm-unknown-linux-gnueabihf-gcc -O2 -mfpu=neon -mthumb -c t.c
t.c: In function ‘f’:
t.c:8:1: error: insn does not satisfy its constraints:
 }
 ^
(insn 18 7 14 2 (parallel [
            (set (reg/i:DI 0 r0)
                (ashiftrt:DI (reg/v:DI 1 r1 [orig:110 t ] [110])
                    (const_int 1 [0x1])))
            (clobber (reg:CC 100 cc))
        ]) t.c:8 131 {arm_ashrdi3_1bit}
     (expr_list:REG_DEAD (reg:SI 2 r2)
        (expr_list:REG_UNUSED (reg:CC 100 cc)
            (nil))))
t.c:8:1: internal compiler error: in copyprop_hardreg_forward_1, at
regcprop.c:775
>From gcc-bugs-return-457310-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Tue Jul 29 11:17:40 2014
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From: "charles.barcza at blackpanther dot hu" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug sanitizer/61875] ATRIBUTE_NONNULL macro error
Date: Tue, 29 Jul 2014 11:17:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?ida875

--- Comment #4 from charles.barcza at blackpanther dot hu ---
Hi,
Confirmed this problem but the follow post solved libsanitizer problem:

"Comment #3 from Tatiana Udalova <t.udalova at samsung dot com> ---

You can fix problem in Tizen via deletting -fexceptions flag from the default
flags for gcc, cross-gcc and cross-gcc-accel packages:
OPT_FLAGS=`echo "$OPT_FLAGS" | sed -e 's/-fexceptions / /'`"


Thx to t.udalova

RGDS

[Bug target/61948] [ARM] [4.9 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[cbaylis at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

cbaylis at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2014-07-29
     Ever confirmed|0                           |1

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[cbaylis at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

--- Comment #2 from cbaylis at gcc dot gnu.org ---
Author: cbaylis
Date: Thu Jul 31 14:27:58 2014
New Revision: 213376

URL: https://gcc.gnu.org/viewcvs?rev=213376&root=gcc&view=rev
Log:
PR target/61948

gcc/ChangeLog:
2014-07-29  Charles Baylis  <charles.baylis@linaro.org>

    PR target/61948
    * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
    constraints are satisfied.
    (<shift>di3_neon): Likewise.

gcc/testsuite/ChangeLog:
2014-07-29  Charles Baylis  <charles.baylis@linaro.org>

        PR target/61948
        * gcc.target/arm/pr61948.c: New test case.



Added:
    trunk/gcc/testsuite/gcc.target/arm/pr61948.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/neon.md
    trunk/gcc/testsuite/ChangeLog

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[cbaylis at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

cbaylis at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from cbaylis at gcc dot gnu.org ---
Fixed in r213376

Mailing list thread: https://gcc.gnu.org/ml/gcc-patches/2014-07/msg02009.html

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[ramana at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.10.0

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

[yroux at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948

--- Comment #4 from yroux at gcc dot gnu.org ---
Author: yroux
Date: Sun Aug 10 22:59:19 2014
New Revision: 213800

URL: https://gcc.gnu.org/viewcvs?rev=213800&root=gcc&view=rev
Log:
gcc/
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

    Backport from trunk r213376.
    2014-07-31  Charles Baylis  <charles.baylis@linaro.org>

    PR target/61948
    * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
    constraints are satisfied.
    (<shift>di3_neon): Likewise.

gcc/testsuite
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
    Backport from trunk r213376.
    2014-07-31  Charles Baylis  <charles.baylis@linaro.org>

    PR target/61948
    * gcc.target/arm/pr61948.c: New test case.


Added:
    branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.target/arm/pr61948.c
Modified:
    branches/linaro/gcc-4_9-branch/gcc/ChangeLog.linaro
    branches/linaro/gcc-4_9-branch/gcc/config/arm/neon.md
    branches/linaro/gcc-4_9-branch/gcc/testsuite/ChangeLog.linaro