From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11938 invoked by alias); 2 Sep 2014 15:39:03 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 11864 invoked by uid 48); 2 Sep 2014 15:38:55 -0000 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/62662] [4.9/5 Regression] Miscompilation of Qt on s390x Date: Tue, 02 Sep 2014 15:39:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 4.9.1 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: krebbel at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.9.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2014-09/txt/msg00860.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62662 --- Comment #4 from Jakub Jelinek --- That is perhaps where we started to have %r11 clobbered in the routine (therefore pro_and_epilogue wanted to save %r11-%r15), and all the %r11 uses later disappear because of later passes (I think cprop_hardreg/rtl_dce mainly). I'd called that perhaps missed optimization, but not where the bug is, because even if IRA/LRA is changed not to do it in this case, there is no guarantee it will not happen on some other code (I mean, the case where during pro_and_epilogue we see one or more of %r7-%r12 registers clobbered in a leaf function, but during mach pass not clobbered anymore AND in addition to that s390_emit_epilogue optimizing and loading return reg from stack slot into non-%r14 register early before load multiple restore for latency reasons (presumably)). IMHO if we consider changing the store multiple instruction in the prologue not to save %r14, either we need to make sure there are no return insns with non-%r14 returns (otherwise e.g. save just %r14-%r15 and we can then just restore %r15), or if there are any, adjust them to return to %r14 instead.