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From: "zhenqiang.chen at arm dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/63210] ira does not select the best register compared with gcc 4.8 for ARM THUMB1
Date: Tue, 09 Sep 2014 06:07:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63210

--- Comment #1 from Zhenqiang Chen <zhenqiang.chen at arm dot com> ---
Here is a workaround patch to show the point.

diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index e2ea359..1573fb5 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1709,6 +1709,8 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
         {
       ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
       enum reg_class conflict_aclass;
+      HARD_REG_SET prof_regs;
+      prof_regs = ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs;

       /* Reload can give another class so we need to check all
          allocnos.  */
@@ -1780,7 +1782,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
             hard_regno = ira_class_hard_regs[aclass][j];
             ira_assert (hard_regno >= 0);
             k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
-            if (k < 0)
+            if (k < 0 || !TEST_HARD_REG_BIT (prof_regs, hard_regno))
               continue;
             full_costs[j] -= conflict_costs[k];
           }

For this case, "r0" is not available for r115. The conflict for r110 on "r0"
maybe meaningless.