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From: "rearnsha at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/63359] aarch64: 32bit registers in inline asm
Date: Wed, 24 Sep 2014 14:57:00 -0000	[thread overview]
Message-ID: <bug-63359-4-bj1ogQvNep@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-63359-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359

--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
So consider:

int f(int i){
  long x;
  asm("lsl %0, %1, 33" : "=r"(x) : "r"(i)); // lshift by more than sizeof(int)
  return x;
}

We really don't care about the top bits in i, so we don't want to extend the
value to 64 bits before we do the shift.  But we can't put "w" on the second
operand since it has to be a 64-bit register.


  parent reply	other threads:[~2014-09-24 14:57 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-24 13:26 [Bug target/63359] New: " glisse at gcc dot gnu.org
2014-09-24 13:55 ` [Bug target/63359] " james.molloy at arm dot com
2014-09-24 14:44 ` rearnsha at gcc dot gnu.org
2014-09-24 14:47 ` james.molloy at arm dot com
2014-09-24 14:57 ` rearnsha at gcc dot gnu.org [this message]
2014-09-24 15:04 ` james.molloy at arm dot com
2014-09-24 15:07 ` glisse at gcc dot gnu.org
2014-09-24 15:21 ` rearnsha at gcc dot gnu.org
2014-09-24 15:27 ` james.molloy at arm dot com
2020-06-15 11:07 ` andysem at mail dot ru

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