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From: "jiwang at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/64011] Fail to compile pr48335-2.c on  big-endian where bit insert instruction supported
Date: Thu, 18 Dec 2014 17:36:00 -0000	[thread overview]
Message-ID: <bug-64011-4-fEpA0wRAap@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-64011-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011

--- Comment #2 from Jiong Wang <jiwang at gcc dot gnu.org> ---
the problem is we do overflow checking at the start of store_bit_field_1, but
that only check the situation where the field lies completely outside the
register, while there do have situation where the field lies partialy in the
register, we need to adjust bitsize for this partial overflow situation in
store_bit_field_using_insv.

will send out patch after testing ok


  parent reply	other threads:[~2014-12-18 17:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-21  3:42 [Bug target/64011] New: Fail to compile pr48335-2.c on big-endian aarch64 chenshanyaoboy at gmail dot com
2014-11-27 14:40 ` [Bug target/64011] " ramana at gcc dot gnu.org
2014-12-17 18:01 ` jiwang at gcc dot gnu.org
2014-12-18 17:36 ` jiwang at gcc dot gnu.org [this message]
2015-01-16 10:15 ` [Bug target/64011] Fail to compile pr48335-2.c on big-endian where bit insert instruction supported jiwang at gcc dot gnu.org
2015-01-16 10:24 ` jiwang at gcc dot gnu.org
2015-02-10  7:32 ` collison at gcc dot gnu.org
2024-03-15 22:04 ` pinskia at gcc dot gnu.org

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