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From: "hjl.tools at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/64412] [regression] ICE in offload compiler: in extract_insn, at recog.c:2327
Date: Sat, 27 Dec 2014 15:21:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64412

--- Comment #3 from H.J. Lu <hjl.tools at gmail dot com> ---
(In reply to iverbin from comment #2)
> (In reply to H.J. Lu from comment #1)
> > (In reply to iverbin from comment #0)
> > > To reproduce using Intel Xeon Phi emulation:
> > > 1. Build offload and host compilers as described in
> > > https://gcc.gnu.org/wiki/Offloading#How_to_try_offloading_enabled_GCC
> > > 2. Run make check-target-libgomp RUNTESTFLAGS="c.exp=e.53.5.c"
> > 
> > Can you create a stanalone testcase for the Intel Xeon Phi offload
> > cross compiler?  It will be easier to debug.
> 
> The offload model in GCC implies 2 compilers: one produces IR for OpenMP
> target regions, and another compiles this IR for Intel Xeon Phi.
> There is no single compiler, which could stream offload IR out, then stream
> it in, and then compile.
> I can reduce e.53.5.c testcase, not sure whether this is helpful.

Can you use "gcc -v -save-temps" to see what is passed to the offload
compiler and feed them to the offload compiler directly?