* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
@ 2015-01-03 18:33 ` joel at gcc dot gnu.org
2015-01-09 15:48 ` ktkachov at gcc dot gnu.org
` (10 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: joel at gcc dot gnu.org @ 2015-01-03 18:33 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #1 from Joel Sherrill <joel at gcc dot gnu.org> ---
I ran a git bisect and it didn't narrow it down much but I hope this helps.
After the list of candidates, I am posting the full git bisect log.
Bisecting: 27 revisions left to test after this (roughly 5 steps)
[9d0ddb1d2f78d8f75d1663c450bfb79a434316a4] -fuse-caller-save - Enable for MIPS
running /users/joel/test-gcc/test.sh
There are only 'skip'ped commits left to test.
The first bad commit could be any of:
c72a450a93b2267ed467dccba674ffbf5cf422aa
e5d9420b3864e1bee10962f9962086f6b4424bd9
b652abf9ece0468d3c4f7e28592f514f92555192
ec0d1d643fa3b5a0a4bb6cdc6e5bad494b84cb7e
0bf90b7bfb72acfedbbe7af3e57e8cca7711434f
754158d9189fd020e9cde6a16c55d0340035f503
9ac9a75871aa0616c341048f1d5fd9ff9567c5c6
f1714fa0234e7465d69869735ac90a5f6959948d
53037a4d5be734e4ccc99db221676fa7cec7a806
db2d29508c505d3fa5beda75afca51e1496d97df
9227ba81ede93aa32eeb27f3f44210e028356d2e
aec1009feb0d0f8568501195a39d47cd86b1b479
30b4a99c52814ac12e95bfbc46855ce3b716ccb0
e9bf1d7eb0815c5e0afb4ceb374ff4222b5647eb
3a2864197399bc0847ad020c536efbdf5a4c9233
753a9c15373e367581810622175047bcd8609231
7ea5b9d97b7ea13ca759b1f7ca4f81a54d9d2698
dbe2840abe44f5b7f3333166547a633abc8fb4ca
09fb1a0adb85c0ced9b1cbf3e354ef3562a04aa9
7ce85a1fe8e0fa9b1ad9913ea82107c8c9a245f3
0d4c8cda4ac52f9d1b8aee46e85205e8fbaf312d
b35f062ed12db8b2aaa9f8485be506baf41b871f
2f6bdc73b914b478dabb7bdd0ad996a9e3567bda
fdfe65e2642826951d8050c4071a9bd00bb8bd14
82a1c922605243e401ea56d1b6288e771dacf248
8b433e5e84822c0bc35942950eb0ccc22dd5c7e6
540af08f9b8503433d9c2aa8d6c93f91bb2e6979
5692b79caf9e04153427ab7c0663509242a447be
1d9ca4f001f34692e768942c8a1295ab96783917
dcfff6f9996e8c7b2d323c806f17325c3bbc4f4e
32ce9a5c4208411361402f60e672c4830da0bc8f
75b115f41512fbbab79191059ba6a21bbd98a7c9
205c3b0ab6423dca05db534c7b7099f39eaee409
49523e2f0b01f0d5e58b16279115be1ab1393147
ac37483380d835da1dd4444b54a2cc8a7e75d12a
c20614820dd7acd77899a9a1ca52071356f05a3e
7f9463ecb4e1285d80975224aff4d71e7a64bc2e
fa64988a95dc95e538fe8d1b44b0fa91e8349966
487fea840105dbb0ff516b797e7d86bea82ef74a
61b1440327acebe3aebb7bca187df4abafbf3179
3a05a70c9631864b0c87824cf983ec0665eea501
de8b47de2e5ffc6bdbba5bf14024a843af5d9012
6b204f796d985a7983f9dd4b37098435814583b9
6f0c730b2b89c556b8846f8859226ffafca93350
587e70a69bd133c66c4d62fb7881753fd0133996
8753931abe4a279eb4b2c945fb8b5c14fc6774c9
0a8b68fa1ad04e3b56733adaa1926448fd96046d
1a344a3feb0312e6bf51cc666449168f28317780
949d4c6f91bc04cd8dafc7b80bb177d4f222a077
e00f93485cc99b84d47c0ef273eb2cf57fd4d73c
41a5159cce6cf6a14d783db438b5cd9e285f5e29
723c5269bcf4c0d7d459b69480602179c24ad73a
9d0ddb1d2f78d8f75d1663c450bfb79a434316a4
d2b854bc935a18434b59f77d8a6e329e4146a2ba
0abea32ce53397ae5f3f9db852687aede815f6d4
Full git bisect log
===================
# bad: [71a1e0b3c4bc5434ba2acc6dc317d98395888eb1] 2015-01-02 Tobias Burnus
<burnus@net-b.de>
# good: [92b64c52c7ab48215e9bbd6b578a1b2324d10497] 2014-01-31 Vladimir Makarov
<vmakarov@redhat.com>
git bisect start 'HEAD' '92b64c52c7ab48215e9bbd6b578a1b2324d10497'
# bad: [73dc3c0d503205db874ed94eb894b2c059031717] 2014-07-31 Arnaud Charlet
<charlet@adacore.com>
git bisect bad 73dc3c0d503205db874ed94eb894b2c059031717
# good: [9fa165ac10cbcbd65142077a0ce0e60cec60d6ae] 2014-05-08 Richard Biener
<rguenther@suse.de>
git bisect good 9fa165ac10cbcbd65142077a0ce0e60cec60d6ae
# bad: [72dc204f1926c75112c52304925b93265e4bec82] rs6000: Make cr5 allocatable
git bisect bad 72dc204f1926c75112c52304925b93265e4bec82
# skip: [30b4a99c52814ac12e95bfbc46855ce3b716ccb0] PR target/61044 *
doc/extend.texi (Local Labels): Note that label differences are not
supported for AVR.
git bisect skip 30b4a99c52814ac12e95bfbc46855ce3b716ccb0
# good: [b3096d437157c3ff9b01315e48eeab7e736bbac0] 2014-05-11 Paolo Carlini
<paolo.carlini@oracle.com>
git bisect good b3096d437157c3ff9b01315e48eeab7e736bbac0
# skip: [6b204f796d985a7983f9dd4b37098435814583b9] runtime: disable split
stacks for runtime_printf function under Clang
git bisect skip 6b204f796d985a7983f9dd4b37098435814583b9
# bad: [a1032d45752b8ff864201ca3ad0b7e289ec4e904] runtime: Initialize variable
to avoid compiler warning.
git bisect bad a1032d45752b8ff864201ca3ad0b7e289ec4e904
# good: [18f0a24b677b550b7271d18959ba994a681af6a4] rs6000: New type attribute
value "halfmul"
git bisect good 18f0a24b677b550b7271d18959ba994a681af6a4
# bad: [a99cebb7bcfba6f574f062bcff80f1f9f67fd179] * config/ia64/ia64.c
(ia64_first_cycle_multipass_dfa_lookahead_guard): Check pending_data_specs
first.
git bisect bad a99cebb7bcfba6f574f062bcff80f1f9f67fd179
# skip: [aec1009feb0d0f8568501195a39d47cd86b1b479] 2014-05-25 Paolo Carlini
<paolo.carlini@oracle.com>
git bisect skip aec1009feb0d0f8568501195a39d47cd86b1b479
# bad: [c98fd781d8c0752f75b4ae03f1fa652b17265c27] *
sanitizer_common/sanitizer_stacktrace.cc: Cherry pick upstream r209879.
* sanitizer_common/sanitizer_common.h: Likewise. * asan/asan_mapping.h:
Likewise. * asan/asan_linux.cc: Likewise. * tsan/tsan_mman.cc: Cherry
pick upstream r209744. * sanitizer_common/sanitizer_allocator.h: Likewise.
git bisect bad c98fd781d8c0752f75b4ae03f1fa652b17265c27
# skip: [3a05a70c9631864b0c87824cf983ec0665eea501] PR testsuite/61319 *
c-c++-common/ubsan/float-cast.h: Conditionally define LLONG_MAX, LLONG_MIN,
and ULLONG_MAX.
git bisect skip 3a05a70c9631864b0c87824cf983ec0665eea501
# good: [59de8eff757be60b55c305635dd3afabcf903bd9] 2014-05-27 Dominique
d'Humieres <dominiq@lps.ens.fr>
git bisect good 59de8eff757be60b55c305635dd3afabcf903bd9
# skip: [753a9c15373e367581810622175047bcd8609231] 2014-05-28 Richard Biener
<rguenther@suse.de>
git bisect skip 753a9c15373e367581810622175047bcd8609231
# bad: [8776d2d7ff0b3caf49cc3bdc8fc4308c7e4e6211] gcc/: *
config/i386/xmmintrin.h (_mm_pause): Move out of scope of pragma
target("sse"). testsuite/: * gcc.target/i386/pause-2.c: New test.
git bisect bad 8776d2d7ff0b3caf49cc3bdc8fc4308c7e4e6211
# skip: [e9bf1d7eb0815c5e0afb4ceb374ff4222b5647eb] RL78 64bit double support
added
git bisect skip e9bf1d7eb0815c5e0afb4ceb374ff4222b5647eb
# bad: [b0ce9fe7bc9453522386eff08973b66b669a98eb] *
testsuite/lib/libstdc++.exp (libstdc++_init): Adjust regexp to work with
previous versions of Tcl.
git bisect bad b0ce9fe7bc9453522386eff08973b66b669a98eb
# skip: [9227ba81ede93aa32eeb27f3f44210e028356d2e] RL78 64bit double support
added
git bisect skip 9227ba81ede93aa32eeb27f3f44210e028356d2e
# skip: [205c3b0ab6423dca05db534c7b7099f39eaee409] gcc/ * doc/md.texi:
Document that the % constraint character must be at the beginning of the
string. * genoutput.c (validate_insn_alternatives): Check that '=', '+'
and '%' only appear at the beginning of a constraint. * ira.c
(commutative_constraint_p): Delete. (ira_get_dup_out_num): Expect the '%'
commutativity marker to be at the start of the string. *
config/alpha/alpha.md (*movmemdi_1, *clrmemdi_1): Remove duplicate '='s.
* config/arm/neon.md (bicdi3_neon): Likewise. * config/iq2000/iq2000.md
(addsi3_internal, subsi3_internal, sgt_si) (slt_si, sltu_si): Likewise.
* config/vax/vax.md (sbcdi3): Likewise. * config/h8300/h8300.md (*cmpstz):
Remove duplicate '+'. * config/arc/arc.md (mulsi_600, mulsidi_600,
umulsidi_600) (mul64): Move '%' to beginning of constraint. *
config/arm/arm.md (*xordi3_insn): Likewise. * config/nds32/nds32.md
(add<mode>3, mulsi3, andsi3, iorsi3) (xorsi3): Likewise.
git bisect skip 205c3b0ab6423dca05db534c7b7099f39eaee409
# good: [6add2e69343004dabec88d6e8c40229c930b4c7c] gcc/ * gencodes.c
(main): Make LAST_INSN_CODE higher than any insn code, rather than any
named insn's code.
git bisect good 6add2e69343004dabec88d6e8c40229c930b4c7c
# bad: [f6edf58416635bdb1e749b4e132aa016ba64bc00] PR debug/61352 *
collect2.c (maybe_run_lto_and_relink): Be sure to always run post ld passes
when lto is used.
git bisect bad f6edf58416635bdb1e749b4e132aa016ba64bc00
# skip: [53037a4d5be734e4ccc99db221676fa7cec7a806] Centralise clearing hardware
capabilities with Sun ld
git bisect skip 53037a4d5be734e4ccc99db221676fa7cec7a806
# skip: [723c5269bcf4c0d7d459b69480602179c24ad73a] gcc/testsuite/ *
gcc.dg/vect/pr52252-ld.c: Fix target and options for the test.
git bisect skip 723c5269bcf4c0d7d459b69480602179c24ad73a
# skip: [dbe2840abe44f5b7f3333166547a633abc8fb4ca] 2014-05-28 Bernd Edlinger
<bernd.edlinger@hotmail.de>
git bisect skip dbe2840abe44f5b7f3333166547a633abc8fb4ca
# skip: [49523e2f0b01f0d5e58b16279115be1ab1393147] * stmt.c
(dump_case_nodes): Don't convert values to HOST_WIDE_INT before printing.
git bisect skip 49523e2f0b01f0d5e58b16279115be1ab1393147
# skip: [c72a450a93b2267ed467dccba674ffbf5cf422aa] -fuse-caller-save - Add
documentation
git bisect skip c72a450a93b2267ed467dccba674ffbf5cf422aa
# skip: [1a344a3feb0312e6bf51cc666449168f28317780] * varasm.c
(get_variable_section): Walk aliases. (place_block_symbol): Walk aliases.
git bisect skip 1a344a3feb0312e6bf51cc666449168f28317780
# skip: [e5d9420b3864e1bee10962f9962086f6b4424bd9] -fuse-caller-save - Support
in lra
git bisect skip e5d9420b3864e1bee10962f9962086f6b4424bd9
# skip: [8753931abe4a279eb4b2c945fb8b5c14fc6774c9] Daily bump.
git bisect skip 8753931abe4a279eb4b2c945fb8b5c14fc6774c9
# skip: [b652abf9ece0468d3c4f7e28592f514f92555192] 2014-05-28 Olivier Hainque
<hainque@adacore.com>
git bisect skip b652abf9ece0468d3c4f7e28592f514f92555192
# skip: [5692b79caf9e04153427ab7c0663509242a447be] * double-int.c
(div_and_round_double) <ROUND_DIV_EXPR>: Use the proper predicate to detect
a negative quotient.
git bisect skip 5692b79caf9e04153427ab7c0663509242a447be
# skip: [0bf90b7bfb72acfedbbe7af3e57e8cca7711434f] 2014-05-28 Richard Biener
<rguenther@suse.de>
git bisect skip 0bf90b7bfb72acfedbbe7af3e57e8cca7711434f
# skip: [82a1c922605243e401ea56d1b6288e771dacf248] * gnat.dg/aliasing1.adb
(dg-final): Robustify pattern matching.
git bisect skip 82a1c922605243e401ea56d1b6288e771dacf248
# skip: [09fb1a0adb85c0ced9b1cbf3e354ef3562a04aa9] 2014-05-28 Richard Biener
<rguenther@suse.de>
git bisect skip 09fb1a0adb85c0ced9b1cbf3e354ef3562a04aa9
# skip: [61b1440327acebe3aebb7bca187df4abafbf3179] Fix demangler testsuite
crashes with CP_DEMANGLE_DEBUG defined
git bisect skip 61b1440327acebe3aebb7bca187df4abafbf3179
# skip: [f1714fa0234e7465d69869735ac90a5f6959948d] 2014-05-28 Richard Biener
<rguenther@suse.de>
git bisect skip f1714fa0234e7465d69869735ac90a5f6959948d
# skip: [2f6bdc73b914b478dabb7bdd0ad996a9e3567bda] libgo/runtime: fix
unused-result warning
git bisect skip 2f6bdc73b914b478dabb7bdd0ad996a9e3567bda
# skip: [ec0d1d643fa3b5a0a4bb6cdc6e5bad494b84cb7e] -fuse-caller-save - Enable
by default at O2 and higher
git bisect skip ec0d1d643fa3b5a0a4bb6cdc6e5bad494b84cb7e
# skip: [b35f062ed12db8b2aaa9f8485be506baf41b871f] Daily bump.
git bisect skip b35f062ed12db8b2aaa9f8485be506baf41b871f
# skip: [0d4c8cda4ac52f9d1b8aee46e85205e8fbaf312d] 2014-05-28 Richard Biener
<rguenther@suse.de>
git bisect skip 0d4c8cda4ac52f9d1b8aee46e85205e8fbaf312d
# skip: [c20614820dd7acd77899a9a1ca52071356f05a3e] 2014-05-28 Tom de Vries
<tom@codesourcery.com>
git bisect skip c20614820dd7acd77899a9a1ca52071356f05a3e
# skip: [d2b854bc935a18434b59f77d8a6e329e4146a2ba] gcc/ * system.h
(TEST_BIT): New macro. * recog.h (alternative_mask): New type.
(ALL_ALTERNATIVES, ALTERNATIVE_BIT): New macros. (recog_data_d): Replace
alternative_enabled_p array with enabled_alternatives. (target_recog):
New structure. (default_target_recog, this_target_recog): Declare.
(get_enabled_alternatives, recog_init): Likewise. * recog.c
(default_target_recog, this_target_recog): New variables.
(get_enabled_alternatives): New function. (extract_insn): Use it.
(recog_init): New function. (preprocess_constraints, constrain_operands):
Adjust for change to recog_data. * postreload.c
(reload_cse_simplify_operands): Likewise. * reload.c (find_reloads):
Likewise. * ira-costs.c (record_reg_classes): Likewise. * ira-lives.c
(single_reg_class): Likewise. Fix bug in which all alternatives after a
disabled one would be skipped. (ira_implicitly_set_insn_hard_regs):
Likewise. * ira.c (ira_setup_alts): Adjust for change to recog_data. *
lra-int.h (lra_insn_recog_data): Replace alternative_enabled_p with
enabled_alternatives. * lra.c (free_insn_recog_data): Update accordingly.
(lra_update_insn_recog_data): Likewise. (lra_set_insn_recog_data):
Likewise. Use get_enabled_alternatives. * lra-constraints.c
(process_alt_operands): Likewise. Handle only_alternative as part of the
enabled mask. * target-globals.h (this_target_recog): Declare.
(target_globals): Add a recog field. (restore_target_globals): Restore
this_target_recog. * target-globals.c: Include recog.h.
(default_target_globals): Initialize recog field. (save_target_globals):
Likewise. * reginfo.c (reinit_regs): Call recog_init. * toplev.c
(backend_init_target): Likewise.
git bisect skip d2b854bc935a18434b59f77d8a6e329e4146a2ba
# skip: [7ce85a1fe8e0fa9b1ad9913ea82107c8c9a245f3] * config/rx/rx.c
(add_vector_labels): New. (rx_output_function_prologue): Call it.
(rx_handle_func_attribute): Don't require empty arguments.
(rx_handle_vector_attribute): New. (rx_attribute_table): Add "vector"
attribute. * doc/extend.texi (interrupt, vector): Document new/changed
RX-specific attributes.
git bisect skip 7ce85a1fe8e0fa9b1ad9913ea82107c8c9a245f3
# bad: [dcd5393fd5b3ac53775a5546f3103958b64789bb] 2014-05-29 Vladimir Makarov
<vmakarov@redhat.com>
git bisect bad dcd5393fd5b3ac53775a5546f3103958b64789bb
# bad: [dd9571fdaa19a1a4c8fbd3f1288e2932f47c9917] Fix rtl-check build
git bisect bad dd9571fdaa19a1a4c8fbd3f1288e2932f47c9917
# skip: [8b433e5e84822c0bc35942950eb0ccc22dd5c7e6] PR c++/61242 *
call.c (build_aggr_conv): Ignore passed in flags. (build_array_conv,
build_complex_conv): Likewise.
git bisect skip 8b433e5e84822c0bc35942950eb0ccc22dd5c7e6
# bad: [0abea32ce53397ae5f3f9db852687aede815f6d4] * arm/iterators.md
(shiftable_ops): New code iterator. (t2_binop0, arith_shift_insn): New
code attributes. * arm/predicates.md (shift_nomul_operator): New predicate.
* arm/arm.md (insn_enabled): Delete. (enabled): Remove
insn_enabled test. (*arith_shiftsi): Delete. Replace with ...
(*<arith_shift_insn>_multsi): ... new pattern.
(*<arith_shift_insn>_shiftsi): ... new pattern. * config/arm/arm.c
(arm_print_operand): Handle operand format 'b'.
git bisect bad 0abea32ce53397ae5f3f9db852687aede815f6d4
# skip: [7ea5b9d97b7ea13ca759b1f7ca4f81a54d9d2698] 2014-05-27 Andrew Pinski
<apinski@cavium.com>
git bisect skip 7ea5b9d97b7ea13ca759b1f7ca4f81a54d9d2698
# skip: [587e70a69bd133c66c4d62fb7881753fd0133996] PR libstdc++/61329 *
include/bits/regex_automaton.tcc (_State_base::_M_print): Add inline
specifier. (_State_base::_M_dot): Likewise.
git bisect skip 587e70a69bd133c66c4d62fb7881753fd0133996
# skip: [3a2864197399bc0847ad020c536efbdf5a4c9233] 2014-05-26 Richard
Sandiford <rdsandiford@googlemail.com> Olivier Hainque
<hainque@adacore.com>
git bisect skip 3a2864197399bc0847ad020c536efbdf5a4c9233
# skip: [6f0c730b2b89c556b8846f8859226ffafca93350] PR libgcc/61152 *
config/arm/arm.h (License): Add note to COPYING.RUNTIME. *
config/arm/arm-cores.def (License): Same. * config/arm/arm-opts.h
(License): Same. * config/arm/aout.h (License): Same. *
config/arm/bpabi.h (License): Same. * config/arm/elf.h (License): Same.
* config/arm/linux-elf.h (License): Same. * config/arm/linux-gas.h
(License): Same. * config/arm/netbsd-elf.h (License): Same. *
config/arm/uclinux-eabi.h (License): Same. * config/arm/uclinux-elf.h
(License): Same. * config/arm/vxworks.h (License): Same.
git bisect skip 6f0c730b2b89c556b8846f8859226ffafca93350
# skip: [db2d29508c505d3fa5beda75afca51e1496d97df] gcc/ PR libgcc/61152
* config/dbx.h (License): Add Runtime Library Exception. *
config/newlib-stdint.h (License): Same. * config/rtems.h (License): Same
* config/initfini-array.h (License): Same * config/v850/v850.h (License):
Same. * config/v850/v850-opts.h (License): Same * config/v850/rtems.h
(License): Same.
git bisect skip db2d29508c505d3fa5beda75afca51e1496d97df
# skip: [de8b47de2e5ffc6bdbba5bf14024a843af5d9012] runtime: fix misc gcc-isms
and undefined behavior
git bisect skip de8b47de2e5ffc6bdbba5bf14024a843af5d9012
# skip: [9ac9a75871aa0616c341048f1d5fd9ff9567c5c6] -fuse-caller-save - Collect
register usage information
git bisect skip 9ac9a75871aa0616c341048f1d5fd9ff9567c5c6
# skip: [487fea840105dbb0ff516b797e7d86bea82ef74a] 2014-05-27 Richard Biener
<rguenther@suse.de>
git bisect skip 487fea840105dbb0ff516b797e7d86bea82ef74a
# skip: [fdfe65e2642826951d8050c4071a9bd00bb8bd14] PR bootstrap/PR61146
* wide-int.cc: Do not include longlong.h when compiling with clang.
git bisect skip fdfe65e2642826951d8050c4071a9bd00bb8bd14
# skip: [fa64988a95dc95e538fe8d1b44b0fa91e8349966] 2014-05-27 Richard Biener
<rguenther@suse.de>
git bisect skip fa64988a95dc95e538fe8d1b44b0fa91e8349966
# skip: [754158d9189fd020e9cde6a16c55d0340035f503] -fuse-caller-save - Use
collected register usage information
git bisect skip 754158d9189fd020e9cde6a16c55d0340035f503
# skip: [7f9463ecb4e1285d80975224aff4d71e7a64bc2e] Add myself to MAINTAINERS.
git bisect skip 7f9463ecb4e1285d80975224aff4d71e7a64bc2e
# skip: [540af08f9b8503433d9c2aa8d6c93f91bb2e6979] * pt.c (tsubst)
[ARRAY_TYPE]: Check for array of array of unknown bound.
git bisect skip 540af08f9b8503433d9c2aa8d6c93f91bb2e6979
# skip: [0a8b68fa1ad04e3b56733adaa1926448fd96046d] [ARM] Vectorise bswap* in
aarch32.
git bisect skip 0a8b68fa1ad04e3b56733adaa1926448fd96046d
# skip: [1d9ca4f001f34692e768942c8a1295ab96783917] PR c++/47202 gcc/cp/
* decl.c (cxx_comdat_group): Return a decl. * optimize.c
(cdtor_comdat_group): Get its DECL_ASSEMBLER_NAME. gcc/ * cgraph.h
(symtab_node::get_comdat_group_id): New. * cgraphunit.c
(analyze_functions): Call it. * symtab.c (dump_symtab_node): Likewise.
* tree.c (decl_comdat_group_id): New. * tree.h: Declare it. *
lto-streamer-out.c (write_symbol): Use it. * trans-mem.c
(ipa_tm_create_version_alias): Likewise.
git bisect skip 1d9ca4f001f34692e768942c8a1295ab96783917
# skip: [ac37483380d835da1dd4444b54a2cc8a7e75d12a] 2014-05-27 Steve Ellcey
<sellcey@mips.com>
git bisect skip ac37483380d835da1dd4444b54a2cc8a7e75d12a
# skip: [dcfff6f9996e8c7b2d323c806f17325c3bbc4f4e] PR c/56724 *
c-typeck.c (convert_arguments): Get location of a parameter. Change error
and warning calls to error_at and warning_at. Pass location of a parameter
to it. Call warning_at with OPT_Wtraditional_conversion.
(convert_for_assignment): Add parameter to WARN_FOR_ASSIGNMENT and
WARN_FOR_QUALIFIERS. Pass expr_loc to those.
git bisect skip dcfff6f9996e8c7b2d323c806f17325c3bbc4f4e
# skip: [e00f93485cc99b84d47c0ef273eb2cf57fd4d73c] Fix bootstrap on
powerpc64le-linux-gnu
git bisect skip e00f93485cc99b84d47c0ef273eb2cf57fd4d73c
# skip: [32ce9a5c4208411361402f60e672c4830da0bc8f] * fold-const.c
(fold_comparison): Clean up and extend X +- C1 CMP C2 to X CMP C2 -+ C1
transformation to EQ_EXPR/NE_EXPR. Add X - Y CMP 0 to X CMP Y
transformation. (fold_binary_loc) <EQ_EXPR/NE_EXPR>: Remove same
transformations.
git bisect skip 32ce9a5c4208411361402f60e672c4830da0bc8f
# skip: [949d4c6f91bc04cd8dafc7b80bb177d4f222a077] 2014-05-27 Richard Biener
<rguenther@suse.de>
git bisect skip 949d4c6f91bc04cd8dafc7b80bb177d4f222a077
# skip: [75b115f41512fbbab79191059ba6a21bbd98a7c9] gcc/ * doc/md.texi:
Document the restrictions on the "enabled" attribute.
git bisect skip 75b115f41512fbbab79191059ba6a21bbd98a7c9
# skip: [41a5159cce6cf6a14d783db438b5cd9e285f5e29] gcc/ * ira.c
(commutative_operand): Adjust for change to recog_data. [Missing from
previous commit.]
git bisect skip 41a5159cce6cf6a14d783db438b5cd9e285f5e29
# skip: [9d0ddb1d2f78d8f75d1663c450bfb79a434316a4] -fuse-caller-save - Enable
for MIPS
git bisect skip 9d0ddb1d2f78d8f75d1663c450bfb79a434316a4
# only skipped commits left to test
# possible first bad commit: [0abea32ce53397ae5f3f9db852687aede815f6d4]
* arm/iterators.md (shiftable_ops): New code iterator. (t2_binop0,
arith_shift_insn): New code attributes. * arm/predicates.md
(shift_nomul_operator): New predicate. * arm/arm.md (insn_enabled):
Delete. (enabled): Remove insn_enabled test. (*arith_shiftsi):
Delete. Replace with ... (*<arith_shift_insn>_multsi): ... new
pattern. (*<arith_shift_insn>_shiftsi): ... new pattern. *
config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
# possible first bad commit: [9d0ddb1d2f78d8f75d1663c450bfb79a434316a4]
-fuse-caller-save - Enable for MIPS
# possible first bad commit: [723c5269bcf4c0d7d459b69480602179c24ad73a]
gcc/testsuite/ * gcc.dg/vect/pr52252-ld.c: Fix target and options for
the test.
# possible first bad commit: [e00f93485cc99b84d47c0ef273eb2cf57fd4d73c] Fix
bootstrap on powerpc64le-linux-gnu
# possible first bad commit: [1a344a3feb0312e6bf51cc666449168f28317780] *
varasm.c (get_variable_section): Walk aliases. (place_block_symbol): Walk
aliases.
# possible first bad commit: [8753931abe4a279eb4b2c945fb8b5c14fc6774c9] Daily
bump.
# possible first bad commit: [6b204f796d985a7983f9dd4b37098435814583b9]
runtime: disable split stacks for runtime_printf function under Clang
# possible first bad commit: [de8b47de2e5ffc6bdbba5bf14024a843af5d9012]
runtime: fix misc gcc-isms and undefined behavior
# possible first bad commit: [61b1440327acebe3aebb7bca187df4abafbf3179] Fix
demangler testsuite crashes with CP_DEMANGLE_DEBUG defined
# possible first bad commit: [7f9463ecb4e1285d80975224aff4d71e7a64bc2e] Add
myself to MAINTAINERS.
# possible first bad commit: [c20614820dd7acd77899a9a1ca52071356f05a3e]
2014-05-28 Tom de Vries <tom@codesourcery.com>
# possible first bad commit: [205c3b0ab6423dca05db534c7b7099f39eaee409] gcc/
* doc/md.texi: Document that the % constraint character must be at the
beginning of the string. * genoutput.c (validate_insn_alternatives): Check
that '=', '+' and '%' only appear at the beginning of a constraint. *
ira.c (commutative_constraint_p): Delete. (ira_get_dup_out_num): Expect the
'%' commutativity marker to be at the start of the string. *
config/alpha/alpha.md (*movmemdi_1, *clrmemdi_1): Remove duplicate '='s.
* config/arm/neon.md (bicdi3_neon): Likewise. * config/iq2000/iq2000.md
(addsi3_internal, subsi3_internal, sgt_si) (slt_si, sltu_si): Likewise.
* config/vax/vax.md (sbcdi3): Likewise. * config/h8300/h8300.md (*cmpstz):
Remove duplicate '+'. * config/arc/arc.md (mulsi_600, mulsidi_600,
umulsidi_600) (mul64): Move '%' to beginning of constraint. *
config/arm/arm.md (*xordi3_insn): Likewise. * config/nds32/nds32.md
(add<mode>3, mulsi3, andsi3, iorsi3) (xorsi3): Likewise.
# possible first bad commit: [75b115f41512fbbab79191059ba6a21bbd98a7c9] gcc/
* doc/md.texi: Document the restrictions on the "enabled" attribute.
# possible first bad commit: [1d9ca4f001f34692e768942c8a1295ab96783917] PR
c++/47202 gcc/cp/ * decl.c (cxx_comdat_group): Return a decl. *
optimize.c (cdtor_comdat_group): Get its DECL_ASSEMBLER_NAME. gcc/ *
cgraph.h (symtab_node::get_comdat_group_id): New. * cgraphunit.c
(analyze_functions): Call it. * symtab.c (dump_symtab_node): Likewise.
* tree.c (decl_comdat_group_id): New. * tree.h: Declare it. *
lto-streamer-out.c (write_symbol): Use it. * trans-mem.c
(ipa_tm_create_version_alias): Likewise.
# possible first bad commit: [540af08f9b8503433d9c2aa8d6c93f91bb2e6979] *
pt.c (tsubst) [ARRAY_TYPE]: Check for array of array of unknown bound.
# possible first bad commit: [8b433e5e84822c0bc35942950eb0ccc22dd5c7e6] PR
c++/61242 * call.c (build_aggr_conv): Ignore passed in flags.
(build_array_conv, build_complex_conv): Likewise.
# possible first bad commit: [fdfe65e2642826951d8050c4071a9bd00bb8bd14] PR
bootstrap/PR61146 * wide-int.cc: Do not include longlong.h when compiling
with clang.
# possible first bad commit: [0d4c8cda4ac52f9d1b8aee46e85205e8fbaf312d]
2014-05-28 Richard Biener <rguenther@suse.de>
# possible first bad commit: [09fb1a0adb85c0ced9b1cbf3e354ef3562a04aa9]
2014-05-28 Richard Biener <rguenther@suse.de>
# possible first bad commit: [dbe2840abe44f5b7f3333166547a633abc8fb4ca]
2014-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
# possible first bad commit: [753a9c15373e367581810622175047bcd8609231]
2014-05-28 Richard Biener <rguenther@suse.de>
# possible first bad commit: [e9bf1d7eb0815c5e0afb4ceb374ff4222b5647eb] RL78
64bit double support added
# possible first bad commit: [9227ba81ede93aa32eeb27f3f44210e028356d2e] RL78
64bit double support added
# possible first bad commit: [53037a4d5be734e4ccc99db221676fa7cec7a806]
Centralise clearing hardware capabilities with Sun ld
# possible first bad commit: [f1714fa0234e7465d69869735ac90a5f6959948d]
2014-05-28 Richard Biener <rguenther@suse.de>
# possible first bad commit: [0bf90b7bfb72acfedbbe7af3e57e8cca7711434f]
2014-05-28 Richard Biener <rguenther@suse.de>
# possible first bad commit: [b652abf9ece0468d3c4f7e28592f514f92555192]
2014-05-28 Olivier Hainque <hainque@adacore.com>
# possible first bad commit: [e5d9420b3864e1bee10962f9962086f6b4424bd9]
-fuse-caller-save - Support in lra
# possible first bad commit: [c72a450a93b2267ed467dccba674ffbf5cf422aa]
-fuse-caller-save - Add documentation
# possible first bad commit: [ec0d1d643fa3b5a0a4bb6cdc6e5bad494b84cb7e]
-fuse-caller-save - Enable by default at O2 and higher
# possible first bad commit: [754158d9189fd020e9cde6a16c55d0340035f503]
-fuse-caller-save - Use collected register usage information
# possible first bad commit: [9ac9a75871aa0616c341048f1d5fd9ff9567c5c6]
-fuse-caller-save - Collect register usage information
# possible first bad commit: [db2d29508c505d3fa5beda75afca51e1496d97df] gcc/
PR libgcc/61152 * config/dbx.h (License): Add Runtime Library Exception.
* config/newlib-stdint.h (License): Same. * config/rtems.h (License):
Same * config/initfini-array.h (License): Same * config/v850/v850.h
(License): Same. * config/v850/v850-opts.h (License): Same *
config/v850/rtems.h (License): Same.
# possible first bad commit: [aec1009feb0d0f8568501195a39d47cd86b1b479]
2014-05-25 Paolo Carlini <paolo.carlini@oracle.com>
# possible first bad commit: [30b4a99c52814ac12e95bfbc46855ce3b716ccb0] PR
target/61044 * doc/extend.texi (Local Labels): Note that label differences
are not supported for AVR.
# possible first bad commit: [3a2864197399bc0847ad020c536efbdf5a4c9233]
2014-05-26 Richard Sandiford <rdsandiford@googlemail.com> Olivier
Hainque <hainque@adacore.com>
# possible first bad commit: [7ea5b9d97b7ea13ca759b1f7ca4f81a54d9d2698]
2014-05-27 Andrew Pinski <apinski@cavium.com>
# possible first bad commit: [7ce85a1fe8e0fa9b1ad9913ea82107c8c9a245f3] *
config/rx/rx.c (add_vector_labels): New. (rx_output_function_prologue): Call
it. (rx_handle_func_attribute): Don't require empty arguments.
(rx_handle_vector_attribute): New. (rx_attribute_table): Add "vector"
attribute. * doc/extend.texi (interrupt, vector): Document new/changed
RX-specific attributes.
# possible first bad commit: [b35f062ed12db8b2aaa9f8485be506baf41b871f] Daily
bump.
# possible first bad commit: [2f6bdc73b914b478dabb7bdd0ad996a9e3567bda]
libgo/runtime: fix unused-result warning
# possible first bad commit: [82a1c922605243e401ea56d1b6288e771dacf248] *
gnat.dg/aliasing1.adb (dg-final): Robustify pattern matching.
# possible first bad commit: [5692b79caf9e04153427ab7c0663509242a447be] *
double-int.c (div_and_round_double) <ROUND_DIV_EXPR>: Use the proper
predicate to detect a negative quotient.
# possible first bad commit: [dcfff6f9996e8c7b2d323c806f17325c3bbc4f4e] PR
c/56724 * c-typeck.c (convert_arguments): Get location of a parameter.
Change error and warning calls to error_at and warning_at. Pass location
of a parameter to it. Call warning_at with OPT_Wtraditional_conversion.
(convert_for_assignment): Add parameter to WARN_FOR_ASSIGNMENT and
WARN_FOR_QUALIFIERS. Pass expr_loc to those.
# possible first bad commit: [32ce9a5c4208411361402f60e672c4830da0bc8f] *
fold-const.c (fold_comparison): Clean up and extend X +- C1 CMP C2 to X CMP
C2 -+ C1 transformation to EQ_EXPR/NE_EXPR. Add X - Y CMP 0 to X CMP Y
transformation. (fold_binary_loc) <EQ_EXPR/NE_EXPR>: Remove same
transformations.
# possible first bad commit: [49523e2f0b01f0d5e58b16279115be1ab1393147] *
stmt.c (dump_case_nodes): Don't convert values to HOST_WIDE_INT before
printing.
# possible first bad commit: [ac37483380d835da1dd4444b54a2cc8a7e75d12a]
2014-05-27 Steve Ellcey <sellcey@mips.com>
# possible first bad commit: [fa64988a95dc95e538fe8d1b44b0fa91e8349966]
2014-05-27 Richard Biener <rguenther@suse.de>
# possible first bad commit: [487fea840105dbb0ff516b797e7d86bea82ef74a]
2014-05-27 Richard Biener <rguenther@suse.de>
# possible first bad commit: [3a05a70c9631864b0c87824cf983ec0665eea501] PR
testsuite/61319 * c-c++-common/ubsan/float-cast.h: Conditionally define
LLONG_MAX, LLONG_MIN, and ULLONG_MAX.
# possible first bad commit: [6f0c730b2b89c556b8846f8859226ffafca93350] PR
libgcc/61152 * config/arm/arm.h (License): Add note to COPYING.RUNTIME.
* config/arm/arm-cores.def (License): Same. * config/arm/arm-opts.h
(License): Same. * config/arm/aout.h (License): Same. *
config/arm/bpabi.h (License): Same. * config/arm/elf.h (License): Same.
* config/arm/linux-elf.h (License): Same. * config/arm/linux-gas.h
(License): Same. * config/arm/netbsd-elf.h (License): Same. *
config/arm/uclinux-eabi.h (License): Same. * config/arm/uclinux-elf.h
(License): Same. * config/arm/vxworks.h (License): Same.
# possible first bad commit: [587e70a69bd133c66c4d62fb7881753fd0133996] PR
libstdc++/61329 * include/bits/regex_automaton.tcc (_State_base::_M_print):
Add inline specifier. (_State_base::_M_dot): Likewise.
# possible first bad commit: [0a8b68fa1ad04e3b56733adaa1926448fd96046d] [ARM]
Vectorise bswap* in aarch32.
# possible first bad commit: [949d4c6f91bc04cd8dafc7b80bb177d4f222a077]
2014-05-27 Richard Biener <rguenther@suse.de>
# possible first bad commit: [41a5159cce6cf6a14d783db438b5cd9e285f5e29] gcc/
* ira.c (commutative_operand): Adjust for change to recog_data. [Missing
from previous commit.]
# possible first bad commit: [d2b854bc935a18434b59f77d8a6e329e4146a2ba] gcc/
* system.h (TEST_BIT): New macro. * recog.h (alternative_mask): New type.
(ALL_ALTERNATIVES, ALTERNATIVE_BIT): New macros. (recog_data_d): Replace
alternative_enabled_p array with enabled_alternatives. (target_recog):
New structure. (default_target_recog, this_target_recog): Declare.
(get_enabled_alternatives, recog_init): Likewise. * recog.c
(default_target_recog, this_target_recog): New variables.
(get_enabled_alternatives): New function. (extract_insn): Use it.
(recog_init): New function. (preprocess_constraints, constrain_operands):
Adjust for change to recog_data. * postreload.c
(reload_cse_simplify_operands): Likewise. * reload.c (find_reloads):
Likewise. * ira-costs.c (record_reg_classes): Likewise. * ira-lives.c
(single_reg_class): Likewise. Fix bug in which all alternatives after a
disabled one would be skipped. (ira_implicitly_set_insn_hard_regs):
Likewise. * ira.c (ira_setup_alts): Adjust for change to recog_data. *
lra-int.h (lra_insn_recog_data): Replace alternative_enabled_p with
enabled_alternatives. * lra.c (free_insn_recog_data): Update accordingly.
(lra_update_insn_recog_data): Likewise. (lra_set_insn_recog_data):
Likewise. Use get_enabled_alternatives. * lra-constraints.c
(process_alt_operands): Likewise. Handle only_alternative as part of the
enabled mask. * target-globals.h (this_target_recog): Declare.
(target_globals): Add a recog field. (restore_target_globals): Restore
this_target_recog. * target-globals.c: Include recog.h.
(default_target_globals): Initialize recog field. (save_target_globals):
Likewise. * reginfo.c (reinit_regs): Call recog_init. * toplev.c
(backend_init_target): Likewise.
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
2015-01-03 18:33 ` [Bug target/64460] " joel at gcc dot gnu.org
@ 2015-01-09 15:48 ` ktkachov at gcc dot gnu.org
2015-01-09 16:02 ` ktkachov at gcc dot gnu.org
` (9 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-09 15:48 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |ice-on-valid-code
Target|arm-rtems |arm-rtems, arm-none-eabi
Status|UNCONFIRMED |NEW
Last reconfirmed| |2015-01-09
CC| |ktkachov at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #2 from ktkachov at gcc dot gnu.org ---
Confirmed
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
2015-01-03 18:33 ` [Bug target/64460] " joel at gcc dot gnu.org
2015-01-09 15:48 ` ktkachov at gcc dot gnu.org
@ 2015-01-09 16:02 ` ktkachov at gcc dot gnu.org
2015-01-09 16:03 ` joel at gcc dot gnu.org
` (8 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-09 16:02 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot gnu.org
--- Comment #3 from ktkachov at gcc dot gnu.org ---
I have a fix in the works. The bug is down to the "shift" attribute value in
one of the patterns, although only xscale_sched_adjust_cost uses that
attribute.
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (2 preceding siblings ...)
2015-01-09 16:02 ` ktkachov at gcc dot gnu.org
@ 2015-01-09 16:03 ` joel at gcc dot gnu.org
2015-01-09 16:06 ` ktkachov at gcc dot gnu.org
` (7 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: joel at gcc dot gnu.org @ 2015-01-09 16:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #4 from Joel Sherrill <joel at gcc dot gnu.org> ---
(In reply to ktkachov from comment #3)
> I have a fix in the works. The bug is down to the "shift" attribute value in
> one of the patterns, although only xscale_sched_adjust_cost uses that
> attribute.
Awesome! I was about to start another attempt at a git bisect but it sounds
like you don't need it. Let me know if it is worth running.
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (3 preceding siblings ...)
2015-01-09 16:03 ` joel at gcc dot gnu.org
@ 2015-01-09 16:06 ` ktkachov at gcc dot gnu.org
2015-01-12 19:51 ` joel at gcc dot gnu.org
` (6 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-09 16:06 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #5 from ktkachov at gcc dot gnu.org ---
(In reply to Joel Sherrill from comment #4)
> (In reply to ktkachov from comment #3)
> > I have a fix in the works. The bug is down to the "shift" attribute value in
> > one of the patterns, although only xscale_sched_adjust_cost uses that
> > attribute.
>
> Awesome! I was about to start another attempt at a git bisect but it sounds
> like you don't need it. Let me know if it is worth running.
Thanks, but no need. I think I've got the root cause and I got a fix that fixes
the testcase, I just need to put it through testing.
A testsuite-appropriate reduced testcase would be nice I guess, although I'll
kick off a reducer soon.
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (4 preceding siblings ...)
2015-01-09 16:06 ` ktkachov at gcc dot gnu.org
@ 2015-01-12 19:51 ` joel at gcc dot gnu.org
2015-01-12 19:56 ` ktkachov at gcc dot gnu.org
` (5 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: joel at gcc dot gnu.org @ 2015-01-12 19:51 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #6 from Joel Sherrill <joel at gcc dot gnu.org> ---
(In reply to ktkachov from comment #5)
> (In reply to Joel Sherrill from comment #4)
> > (In reply to ktkachov from comment #3)
> > > I have a fix in the works. The bug is down to the "shift" attribute value in
> > > one of the patterns, although only xscale_sched_adjust_cost uses that
> > > attribute.
> >
> > Awesome! I was about to start another attempt at a git bisect but it sounds
> > like you don't need it. Let me know if it is worth running.
>
> Thanks, but no need. I think I've got the root cause and I got a fix that
> fixes the testcase, I just need to put it through testing.
>
> A testsuite-appropriate reduced testcase would be nice I guess, although
> I'll kick off a reducer soon.
FWIW the head now builds for arm-rtems again but the bug is still present
with 15b6c83e88101ec7e2efedc114a7940cfbffa479.
FWIW there are a few warnings building the ARM:
../../../../../../gcc/libgcc/config/arm/fp16.c:97:1: warning: no previous
prototype for '__gnu_h2f_internal' [-Wmissing-prototypes]
../../../../../../gcc/libgcc/config/arm/fp16.c:122:1: warning: no previous
prototype for '__gnu_f2h_ieee' [-Wmissing-prototypes]
../../../../../../gcc/libgcc/config/arm/fp16.c:128:1: warning: no previous
prototype for '__gnu_h2f_ieee' [-Wmissing-prototypes]
../../../../../../gcc/libgcc/config/arm/fp16.c:134:1: warning: no previous
prototype for '__gnu_f2h_alternative' [-Wmissing-prototypes]
../../../../../../gcc/libgcc/config/arm/fp16.c:140:1: warning: no previous
prototype for '__gnu_h2f_alternative' [-Wmissing-prototypes]
../../../../../../gcc/libgcc/unwind-arm-common.inc:245:29: warning: cast
discards 'const' qualifier from pointer target type [-Wcast-qual]
../../../../../../gcc/libgcc/emutls.c:159:13: warning: implicit declaration of
function 'calloc' [-Wimplicit-function-declaration]
../../../../../../gcc/libgcc/emutls.c:159:13: warning: incompatible implicit
declaration of built-in function 'calloc'
../../../../../../gcc/libgcc/emutls.c:171:13: warning: implicit declaration of
function 'realloc' [-Wimplicit-function-declaration]
../../../../../../gcc/libgcc/emutls.c:171:13: warning: incompatible implicit
declaration of built-in function 'realloc'
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (5 preceding siblings ...)
2015-01-12 19:51 ` joel at gcc dot gnu.org
@ 2015-01-12 19:56 ` ktkachov at gcc dot gnu.org
2015-01-12 20:41 ` joel at gcc dot gnu.org
` (4 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-12 19:56 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #7 from ktkachov at gcc dot gnu.org ---
I guess the testcase is flaky.
I've posted the patch to fix the ICE and the reasoning behind it at
https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00686.html
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (6 preceding siblings ...)
2015-01-12 19:56 ` ktkachov at gcc dot gnu.org
@ 2015-01-12 20:41 ` joel at gcc dot gnu.org
2015-01-14 9:49 ` ktkachov at gcc dot gnu.org
` (3 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: joel at gcc dot gnu.org @ 2015-01-12 20:41 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #8 from Joel Sherrill <joel at gcc dot gnu.org> ---
(In reply to ktkachov from comment #7)
> I guess the testcase is flaky.
> I've posted the patch to fix the ICE and the reasoning behind it at
> https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00686.html
Can you try again with the full test case? The head still fails for me at -O2
and -Os but not -O1. The location in toplev.c has moved down a few lines.
FWIW my original report had -mcpu=xscale but it fails with -mtune=xscale as
well. I
$ ~/test-gcc/install-head/bin/arm-rtems4.11-gcc --version
arm-rtems4.11-gcc (GCC) 5.0.0 20150112 (experimental)
$ ~/test-gcc/install-head/bin/arm-rtems4.11-gcc -mtune=xscale -O2
/tmp/gumstix.c
../../../../../../rtems/c/src/../../cpukit/score/src/objectextendinformation.c:
In function '_Objects_Extend_information':
../../../../../../rtems/c/src/../../cpukit/score/src/objectextendinformation.c:278:1:
internal compiler error: Segmentation fault
0x93b6ef crash_signal
../../gcc/gcc/toplev.c:372
0x8e4890 reg_overlap_mentioned_p(rtx_def const*, rtx_def const*)
../../gcc/gcc/rtlanal.c:1519
0xc0dd5c xscale_sched_adjust_cost
../../gcc/gcc/config/arm/arm.c:11534
0xc0d97b arm_adjust_cost
../../gcc/gcc/config/arm/arm.c:11984
0xe1979f dep_cost_1(_dep*, unsigned int)
../../gcc/gcc/haifa-sched.c:1513
0xe1af07 dep_cost(_dep*)
../../gcc/gcc/haifa-sched.c:1532
0xe1af07 priority
../../gcc/gcc/haifa-sched.c:1683
0xe1afff set_priorities(rtx_insn*, rtx_insn*)
../../gcc/gcc/haifa-sched.c:6796
0x8ecd2c compute_priorities()
../../gcc/gcc/sched-rgn.c:2940
0x8ef94d schedule_region
../../gcc/gcc/sched-rgn.c:3033
0x8ef94d schedule_insns()
../../gcc/gcc/sched-rgn.c:3431
0x8f0053 schedule_insns()
../../gcc/gcc/sched-rgn.c:3416
0x8f0053 rest_of_handle_sched
../../gcc/gcc/sched-rgn.c:3635
0x8f0053 execute
../../gcc/gcc/sched-rgn.c:3743
Please submit a full bug report,
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (7 preceding siblings ...)
2015-01-12 20:41 ` joel at gcc dot gnu.org
@ 2015-01-14 9:49 ` ktkachov at gcc dot gnu.org
2015-01-14 10:15 ` ktkachov at gcc dot gnu.org
` (2 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-14 9:49 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #9 from ktkachov at gcc dot gnu.org ---
(In reply to Joel Sherrill from comment #8)
> (In reply to ktkachov from comment #7)
> > I guess the testcase is flaky.
> > I've posted the patch to fix the ICE and the reasoning behind it at
> > https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00686.html
>
> Can you try again with the full test case? The head still fails for me at
> -O2 and -Os but not -O1. The location in toplev.c has moved down a few lines.
>
My patch has not gone in yet, did you try applying it by hand and trying it
out?
I just tried the full testcase on r219461 and it ICEs without my patch and
compiles fine with my patch applied
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (8 preceding siblings ...)
2015-01-14 9:49 ` ktkachov at gcc dot gnu.org
@ 2015-01-14 10:15 ` ktkachov at gcc dot gnu.org
2015-01-14 10:19 ` ktkachov at gcc dot gnu.org
2015-02-10 7:54 ` collison at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-14 10:15 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #10 from ktkachov at gcc dot gnu.org ---
Author: ktkachov
Date: Wed Jan 14 10:14:23 2015
New Revision: 219583
URL: https://gcc.gnu.org/viewcvs?rev=219583&root=gcc&view=rev
Log:
[ARM] Fix PR target/64460: Set 'shift' attr properly on some patterns.
PR target/64460
* config/arm/arm.md (*<arith_shift_insn>_multsi): Set 'shift' to 2.
(*<arith_shift_insn>_shiftsi): Set 'shift' attr to 3.
* gcc.target/arm/pr64460_1.c: New test.
Added:
trunk/gcc/testsuite/gcc.target/arm/pr64460_1.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/arm.md
trunk/gcc/testsuite/ChangeLog
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (9 preceding siblings ...)
2015-01-14 10:15 ` ktkachov at gcc dot gnu.org
@ 2015-01-14 10:19 ` ktkachov at gcc dot gnu.org
2015-02-10 7:54 ` collison at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2015-01-14 10:19 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #11 from ktkachov at gcc dot gnu.org ---
Joel, can you try trunk after this commit to confirm that it fixes the ICE on
your end and close this off if ok?
Thanks,
Kyrill
^ permalink raw reply [flat|nested] 13+ messages in thread* [Bug target/64460] ARM ICE on valid code
2014-12-31 20:18 [Bug target/64460] New: ARM ICE on valid code joel at gcc dot gnu.org
` (10 preceding siblings ...)
2015-01-14 10:19 ` ktkachov at gcc dot gnu.org
@ 2015-02-10 7:54 ` collison at gcc dot gnu.org
11 siblings, 0 replies; 13+ messages in thread
From: collison at gcc dot gnu.org @ 2015-02-10 7:54 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460
--- Comment #13 from collison at gcc dot gnu.org ---
Author: collison
Date: Tue Feb 10 07:53:23 2015
New Revision: 220570
URL: https://gcc.gnu.org/viewcvs?rev=220570&root=gcc&view=rev
Log:
2015-02-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r219583.
2015-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64460
* config/arm/arm.md (*<arith_shift_insn>_multsi): Set 'shift' to 2.
(*<arith_shift_insn>_shiftsi): Set 'shift' attr to 3.
2015-02-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r217430.
2014-11-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.c (*<arith_shift_insn>_shiftsi): Fix typo.
2015-02-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r219583.
2015-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64460
* gcc.target/arm/pr64460_1.c: New test.
Added:
branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.target/arm/pr64460_1.c
Modified:
branches/linaro/gcc-4_9-branch/gcc/ChangeLog.linaro
branches/linaro/gcc-4_9-branch/gcc/config/arm/arm.md
branches/linaro/gcc-4_9-branch/gcc/testsuite/ChangeLog.linaro
^ permalink raw reply [flat|nested] 13+ messages in thread