[Bug target/64659] New: [SH] Immedate values not used for atomic ops

[Bug target/64659] New: [SH] Immedate values not used for atomic ops

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64659

            Bug ID: 64659
           Summary: [SH] Immedate values not used for atomic ops
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
            Target: sh*-*-*

Compiling the following example:

void test4 (volatile int* mem)
{
  __atomic_or_fetch (mem, 1, __ATOMIC_ACQ_REL);
}

with -O2 -m4a -m{l|b} -matomic-model=soft-gusa results in:

        mov    #1,r1

0:      movli.l    @r4,r0  ! 7  atomic_or_fetchsi_hard  [length = 8]
        or    r1,r0
        movco.l    r0,@r4
        bf    0b
        rts
        nop

For some reason, the predicates 'atomic_arith_operand' and
'atomic_logical_operand' don't allow immediate values, although they are
supposed to do so.

[Bug target/64659] [SH] Immedate values not used for atomic ops

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64659

Oleg Endo <olegendo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-01-18
     Ever confirmed|0                           |1

--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
The predicates must include "const_int" in match_code, otherwise the generated
predicate code will check the operand mode and will reject const_int since they
don't have a mode.

The following fixes the issue:

Index: gcc/config/sh/predicates.md
===================================================================
--- gcc/config/sh/predicates.md    (revision 219823)
+++ gcc/config/sh/predicates.md    (working copy)
@@ -1139,18 +1139,20 @@
 ;; values.  Using these predicates avoids the usage of 'force_reg' in the
 ;; expanders.
 (define_predicate "atomic_arith_operand"
-  (ior (match_code "subreg,reg")
-       (and (match_test "satisfies_constraint_I08 (op)")
-        (match_test "mode != QImode")
-        (match_test "mode != HImode")
-        (match_test "TARGET_SH4A"))))
+  (and (match_code "subreg,reg,const_int")
+       (ior (match_operand 0 "arith_reg_operand")
+            (and (match_test "satisfies_constraint_I08 (op)")
+             (match_test "mode != QImode")
+             (match_test "mode != HImode")
+             (match_test "TARGET_SH4A")))))

 (define_predicate "atomic_logical_operand"
-  (ior (match_code "subreg,reg")
-       (and (match_test "satisfies_constraint_K08 (op)")
-        (match_test "mode != QImode")
-        (match_test "mode != HImode")
-        (match_test "TARGET_SH4A"))))
+  (and (match_code "subreg,reg,const_int")
+       (ior (match_operand 0 "arith_reg_operand")
+            (and (match_test "satisfies_constraint_K08 (op)")
+             (match_test "mode != QImode")
+             (match_test "mode != HImode")
+             (match_test "TARGET_SH4A")))))

 ;; A predicate describing the T bit register in any form.
 (define_predicate "t_reg_operand"

[Bug target/64659] [SH] Immedate values not used for atomic ops

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64659

--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> ---
The other issue is that atomic add insns for models other than 'hard-llcs' do
not utilize the 'add #imm,Rn' insn at all, because those insns allow
'register_operand' only.

[Bug target/64659] [SH] Immedate values not used for atomic ops

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64659

--- Comment #3 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Author: olegendo
Date: Wed Jan 28 21:11:37 2015
New Revision: 220217

URL: https://gcc.gnu.org/viewcvs?rev=220217&root=gcc&view=rev
Log:
gcc/
    PR target/64659
    * config/sh/predicates.md (atomic_arith_operand,
    atomic_logical_operand): Remove.
    * config/sh/sync.md (fetchop_predicate, fetchop_constraint): Remove.
    (atomic_arith_operand_0): New predicate.
    (atomic_compare_and_swap<mode>): Use arith_reg_dest for output values.
    Use atomic_arith_operand_0 for input values.
    (atomic_compare_and_swapsi_hard, atomic_compare_and_swap<mode>_hard,
    atomic_compare_and_swap<mode>_soft_gusa,
    atomic_compare_and_swap<mode>_soft_tcb,
    atomic_compare_and_swap<mode>_soft_imask): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.
    (atomic_exchange<mode>): Use arith_reg_dest for output value.  Use
    atomic_arith_operand_0 for newval input.
    (atomic_exchangesi_hard, atomic_exchange<mode>_hard,
    atomic_exchange<mode>_soft_gusa, atomic_exchange<mode>_soft_tcb,
    atomic_exchange<mode>_soft_imask): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.
    (atomic_arith_operand_1, atomic_logical_operand_1): New predicates.
    fetchop_predicate_1, fetchop_constraint_1_llcs,
    fetchop_constraint_1_gusa, fetchop_constraint_1_tcb,
    fetchop_constraint_1_imask): New code iterator attributes.
    (atomic_fetch_<fetchop_name><mode>): Use arith_reg_dest instead of
    register_operand.  Use fetchop_predicate_1.
    (atomic_fetch_<fetchop_name>si_hard,
    atomic_fetch_<fetchop_name><mode>_hard): Use arith_reg_dest instead of
    register_operand.  Use fetchop_predicate_1, fetchop_constraint_1_llcs.
    (atomic_fetch_<fetchop_name><mode>_soft_gusa): Use arith_reg_dest
    and arith_reg_operand instead of register_operand.  Use
    fetchop_predicate_1, fetchop_constraint_1_gusa.
    (atomic_fetch_<fetchop_name><mode>_soft_tcb): Use arith_reg_dest
    and arith_reg_operand instead of register_operand.  Use
    fetchop_predicate_1, fetchop_constraint_1_tcb.  Adjust asm sequence
    to allow R0 usage.
    (atomic_fetch_<fetchop_name><mode>_soft_imask): Use arith_reg_dest
    and arith_reg_operand instead of register_operand.  Use
    fetchop_predicate_1, fetchop_constraint_1_imask.  Adjust asm sequence
    to allow R0 usage.
    (atomic_fetch_nand<mode>): Use arith_reg_dest instead of
    register_operand.  Use atomic_logical_operand_1.
    (atomic_fetch_nandsi_hard, atomic_fetch_nand<mode>_hard,
    atomic_fetch_nand<mode>_soft_gusa): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.
    (atomic_fetch_nand<mode>_soft_tcb, atomic_fetch_nand<mode>_soft_imask):
    Use arith_reg_dest and arith_reg_operand instead of register_operand.
    Use logical_operand and rK08.  Adjust asm sequence to allow R0 usage.
    (atomic_<fetchop_name>_fetch<mode>): Use arith_reg_dest instead of
    register_operand.  Use fetchop_predicate_1.
    (atomic_<fetchop_name>_fetchsi_hard,
    atomic_<fetchop_name>_fetch<mode>_hard): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
    fetchop_constraint_1_llcs.
    (atomic_<fetchop_name>_fetch<mode>_soft_gusa): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
    fetchop_constraint_1_gusa.
    (atomic_<fetchop_name>_fetch<mode>_soft_tcb): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
    fetchop_constraint_1_tcb.  Adjust asm sequence to allow R0 usage.
    (atomic_<fetchop_name>_fetch<mode>_soft_imask): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
    fetchop_constraint_1_imask.  Adjust asm sequence to allow R0 usage.
    (atomic_nand_fetch<mode>): Use arith_reg_dest instead of
    register_operand.  Use atomic_logical_operand_1.
    (atomic_nand_fetchsi_hard, atomic_nand_fetch<mode>_hard,
    atomic_nand_fetch<mode>_soft_gusa): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.
    (atomic_nand_fetch<mode>_soft_tcb): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use logical_operand
    and K08.  Adjust asm sequence to allow R0 usage.
    (atomic_nand_fetch<mode>_soft_imask): Use arith_reg_dest and
    arith_reg_operand instead of register_operand.  Use logical_operand
    and K08.

gcc/testsuite/
    PR target/64659
    * gcc.target/sh/sh.exp
    (check_effective_target_atomic_model_soft_gusa_available,
    check_effective_target_atomic_model_soft_tcb_available,
    check_effective_target_atomic_model_soft_imask_available,
    check_effective_target_atomic_model_hard_llcs_available): New.
    * gcc.target/sh/pr64659-0.h: New.
    * gcc.target/sh/pr64659-1.c: New.
    * gcc.target/sh/pr64659-2.c: New.
    * gcc.target/sh/pr64659-3.c: New.
    * gcc.target/sh/pr64659-4.c: New.


Added:
    trunk/gcc/testsuite/gcc.target/sh/pr64659-0.h
    trunk/gcc/testsuite/gcc.target/sh/pr64659-1.c
    trunk/gcc/testsuite/gcc.target/sh/pr64659-2.c
    trunk/gcc/testsuite/gcc.target/sh/pr64659-3.c
    trunk/gcc/testsuite/gcc.target/sh/pr64659-4.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/sh/predicates.md
    trunk/gcc/config/sh/sync.md
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/sh/sh.exp

[Bug target/64659] [SH] Immedate values not used for atomic ops

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64659

Oleg Endo <olegendo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #4 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Fixed for GCC 5.