[Bug target/64661] New: [SH] Allow @(disp,reg) address mode for atomics

[Bug target/64661] New: [SH] Allow @(disp,reg) address mode for atomics

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64661

            Bug ID: 64661
           Summary: [SH] Allow @(disp,reg) address mode for atomics
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
            Target: sh*-*-*

Atomics that do not use the 'movli.l' and 'movco.l' insns should be able to use
the '@(disp,reg)' address mode for SImode, since those don't have a R0 operand
restriction.

For example:

void test4 (int* mem)
{
  __atomic_add_fetch (mem + 3, 1, __ATOMIC_ACQ_REL);
}

now compiled with -O2 -m4 -ml -matomic-model=soft-gusa:

        mov     #1,r2
        add     #12,r4

        mova    1f,r0
        mov     r15,r1
        .align 2
        mov     #(0f-1f),r15
0:      mov.l   @r4,r3
        add     r2,r3
        mov.l   r3,@r4
1:      mov     r1,r15

should be:
        mova    1f,r0
        mov     r15,r1
        .align 2
        mov     #(0f-1f),r15
0:      mov.l   @(12,r4),r2   // use @(disp,reg)
        add     #1,r2         // PR 64659
        mov.l   r2,@(12,r4)   // use @(disp,reg)
1:      mov     r1,r15


The 'atomic_<fetchop_name>_fetch<mode>_soft_imask' and
'atomic_nand_fetch<mode>_soft_imask' insns could also use QImode and HImode
@(disp,reg) address modes, since the other operand is already R0.

[Bug target/64661] [SH] Allow @(disp,reg) address mode for atomics

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64661

--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Author: olegendo
Date: Tue Feb 10 20:47:33 2015
New Revision: 220594

URL: https://gcc.gnu.org/viewcvs?rev=220594&root=gcc&view=rev
Log:
gcc/
    PR target/64661
    * config/sh/sh-protos.h (TARGET_ATOMIC_ANY, TARGET_ATOMIC_STRICT,
    TARGET_ATOMIC_SOFT_GUSA, TARGET_ATOMIC_HARD_LLCS,
    TARGET_ATOMIC_SOFT_TCB, TARGET_ATOMIC_SOFT_IMASK): Add parentheses.
    * config/sh/constraints.md (Ara, Add): New constraints.
    * config/sh/sync.md (atomic_mem_operand_0, atomic_mem_operand_1): New
    predicates.
    (atomic_compare_and_swap<mode>, atomic_exchange<mode>): Use
    atomic_mem_operand_0.  Don't use force_reg on the memory address.
    (atomic_compare_and_swapsi_hard): Use atomic_mem_operand_0 predicate and
    Sra constraint.  Convert to insn_and_split.  Add workaround for
    PR 64974.
    (atomic_compare_and_swap<mode>_hard): Copy to
    atomic_compare_and_swap<mode>_hard_1.  Convert to insn_and_split.
    Use atomic_mem_operand_0 predicate.
    (atomic_compare_and_swap<mode>_soft_gusa,
    atomic_exchange<mode>_soft_gusa): Use atomic_mem_operand_0 predicate and
    AraAdd constraints.
    (atomic_compare_and_swap<mode>_soft_tcb,
    atomic_compare_and_swap<mode>_soft_imask,
    atomic_exchange<mode>_soft_tcb, atomic_exchange<mode>_soft_imask): Use
    atomic_mem_operand_0 predicate and SraSdd constraints.
    (atomic_exchangesi_hard) Use atomic_mem_operand_0 predicate and Sra
    constraint.
    (atomic_exchange<mode>_hard): Copy to atomic_exchange<mode>_hard_1.
    Convert to insn_and_split.  Use atomic_mem_operand_0 predicate.
    (atomic_fetch_<fetchop_name><mode>, atomic_fetch_nand<mode>,
    atomic_<fetchop_name>_fetch<mode>): Use atomic_mem_operand_1.  Don't use
    force_reg on the memory address.
    (atomic_fetch_<fetchop_name>si_hard, atomic_fetch_notsi_hard,
    atomic_fetch_nandsi_hard, atomic_<fetchop_name>_fetchsi_hard,
    atomic_not_fetchsi_hard, atomic_nand_fetchsi_hard): Use
    atomic_mem_operand_1 predicate and Sra constraint.
    (atomic_fetch_<fetchop_name><mode>_hard): Copy to
    atomic_fetch_<fetchop_name><mode>_hard_1.  Convert to insn_and_split.
    Use atomic_mem_operand_1 predicate.
    (atomic_<fetchop_name><mode>_hard): Copy to
    atomic_<fetchop_name><mode>_hard_1.  Convert to insn_and_split.
    Use atomic_mem_operand_1 predicate.
    (atomic_fetch_nand<mode>_hard): Copy to atomic_fetch_nand<mode>_hard_1.
    Convert to insn_and_split.  Use atomic_mem_operand_1 predicate.
    (atomic_nand<mode>_hard): Copy to atomic_nand<mode>_hard_1.  Convert to
    insn_and_split.  Use atomic_mem_operand_1 predicate.
    (atomic_<fetchop_name>_fetch<mode>_hard): Copy to
    atomic_<fetchop_name>_fetch<mode>_hard_1.  Convert to insn_and_split.
    Use atomic_mem_operand_1 predicate.
    (atomic_nand_fetch<mode>_hard): Copy to atomic_nand_fetch<mode>_hard_1.
    Convert to insn_and_split.  Use atomic_mem_operand_1 predicate.
    (atomic_fetch_not<mode>_hard, atomic_not_fetch<mode>_hard): Replace mems
    in generated insn with original mem operand before emitting the insn.
    (atomic_fetch_<fetchop_name><mode>_soft_gusa,
    atomic_fetch_not<mode>_soft_gusa, atomic_fetch_nand<mode>_soft_gusa,
    atomic_<fetchop_name>_fetch<mode>_soft_gusa,
    atomic_not_fetch<mode>_soft_gusa, atomic_nand_fetch<mode>_soft_gusa):
    Use atomic_mem_operand_1 predicate and AraAdd constraints.
    (atomic_fetch_<fetchop_name><mode>_soft_tcb,
    atomic_<fetchop_name><mode>_soft_tcb, atomic_fetch_not<mode>_soft_tcb,
    atomic_not<mode>_soft_tcb, atomic_fetch_<fetchop_name><mode>_soft_imask,
    atomic_fetch_not<mode>_soft_imask, atomic_fetch_nand<mode>_soft_tcb,
    atomic_nand<mode>_soft_tcb, atomic_fetch_nand<mode>_soft_imask,
    atomic_<fetchop_name>_fetch<mode>_soft_tcb,
    atomic_not_fetch<mode>_soft_tcb,
    atomic_<fetchop_name>_fetch<mode>_soft_imask,
    atomic_not_fetch<mode>_soft_imask, atomic_nand_fetch<mode>,
    atomic_nand_fetch<mode>_soft_tcb, atomic_nand_fetch<mode>_soft_imask):
    Use atomic_mem_operand_1 predicate and SraSdd constraints.

gcc/testsuite/
    PR target/64661
    * gcc.taget/sh/pr64661-0.h: New.
    * gcc.taget/sh/pr64661-1.c: New.
    * gcc.taget/sh/pr64661-2.c: New.
    * gcc.taget/sh/pr64661-3.c: New.
    * gcc.taget/sh/pr64661-4.c: New.

Added:
    trunk/gcc/testsuite/gcc.target/sh/pr64661-0.h
    trunk/gcc/testsuite/gcc.target/sh/pr64661-1.c
    trunk/gcc/testsuite/gcc.target/sh/pr64661-2.c
    trunk/gcc/testsuite/gcc.target/sh/pr64661-3.c
    trunk/gcc/testsuite/gcc.target/sh/pr64661-4.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/sh/constraints.md
    trunk/gcc/config/sh/sh-protos.h
    trunk/gcc/config/sh/sync.md
    trunk/gcc/testsuite/ChangeLog

[Bug target/64661] [SH] Allow @(disp,reg) address mode for atomics

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64661

Oleg Endo <olegendo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Fixed for GCC 5.