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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/64731] vector lowering should split loads and
 stores
Date: Fri, 12 May 2023 06:42:33 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D64731

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot =
gnu.org
             Status|NEW                         |ASSIGNED

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
Yes, forwprop splits the vector loads:

  _5 =3D &MEM[(double4 *)a_11(D) + ivtmp.14_22 * 1];
  _1 =3D BIT_FIELD_REF <MEM[(double4 *)_5], 128, 128>;
  _25 =3D BIT_FIELD_REF <MEM[(double4 *)_5], 128, 0>;
  _14 =3D &MEM[(double4 *)b_12(D) + ivtmp.14_22 * 1];
  _2 =3D BIT_FIELD_REF <MEM[(double4 *)_14], 128, 128>;
  _17 =3D BIT_FIELD_REF <MEM[(double4 *)_14], 128, 0>;
  _24 =3D _17 + _25;
  _3 =3D _1 + _2;

but not the store from the CTOR:

  _7 =3D {_24, _3};
  MEM[(double4 *)a_11(D) + ivtmp.14_22 * 1] =3D _7;

forwprop would also split that, but we have

          else if (code =3D=3D CONSTRUCTOR
                   && VECTOR_TYPE_P (TREE_TYPE (rhs))
                   && TYPE_MODE (TREE_TYPE (rhs)) =3D=3D BLKmode
                   && CONSTRUCTOR_NELTS (rhs) > 0
                   && (!VECTOR_TYPE_P (TREE_TYPE (CONSTRUCTOR_ELT (rhs,
0)->value))
                       || (TYPE_MODE (TREE_TYPE (CONSTRUCTOR_ELT (rhs,
0)->value))
                           !=3D BLKmode)))
            {
              /* Rewrite stores of a single-use vector constructors
                 to component-wise stores if the mode isn't supported.  */
              use_operand_p use_p;
              gimple *use_stmt;
              if (single_imm_use (lhs, &use_p, &use_stmt)
                  && gimple_store_p (use_stmt)
                  && !gimple_has_volatile_ops (use_stmt)
                  && !stmt_can_throw_internal (fun, use_stmt)
                  && is_gimple_assign (use_stmt)
                  && (TREE_CODE (gimple_assign_lhs (use_stmt))
                      !=3D TARGET_MEM_REF))

and in this case there's a TARGET_MEM_REF on the LHS.  With -fno-ivopts we
get

.L2:
        movslq  %ecx, %rax
        addl    $4, %ecx
        salq    $3, %rax
        leaq    (%rdi,%rax), %rdx
        addq    %rsi, %rax
        movapd  16(%rax), %xmm0
        movapd  (%rdx), %xmm1
        addpd   16(%rdx), %xmm0
        addpd   (%rax), %xmm1
        movaps  %xmm0, 16(%rdx)
        movaps  %xmm1, (%rdx)
        subl    $1, %r8d
        jne     .L2

We could use the same trick as optimize_vector_load and instead of a
TARGET_MEM_REF memory reference use that only as address generation.=