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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug middle-end/64809] [5 Regression] ICE at -O3 with -g enabled on x86_64-linux-gnu (in 32-bit mode)
Date: Tue, 27 Jan 2015 09:15:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64809

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P1
                 CC|                            |jakub at gcc dot gnu.org
            Summary|ICE at -O3 with -g enabled  |[5 Regression] ICE at -O3
                   |on x86_64-linux-gnu (in     |with -g enabled on
                   |32-bit mode)                |x86_64-linux-gnu (in 32-bit
                   |                            |mode)

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I can't seem to reproduce this, even with valgrind.
Line 5031 is:
          lattice[i] += lattice[gimple_uid (def_stmt)];
But adding a gcc_assert (gimple_bb (def_stmt) == bb);
ICEs on this testcase, so the assumptions that we only TER inside bbs is
apparently false, either due to some bug or intentionally so.
In that case, either we need to fix that bug or change reorder_operands back to
check gimple_bb (def_stmt) == bb in all 3 spots where reorder_operands calls
get_gimple_for_ssa_name.