From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12264 invoked by alias); 2 Feb 2015 08:45:48 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 12228 invoked by uid 48); 2 Feb 2015 08:45:44 -0000 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/64897] Floating-point "and" not optimized on x86-64 Date: Mon, 02 Feb 2015 08:45:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 4.9.2 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: keywords cf_gcctarget bug_status cf_reconfirmed_on everconfirmed Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-02/txt/msg00090.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64897 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- Keywords| |missed-optimization Target| |x86_64-*-*, i?86-*-* Status|UNCONFIRMED |NEW Last reconfirmed| |2015-02-02 Ever confirmed|0 |1 --- Comment #1 from Richard Biener --- We expand from fand1 (double x) { long unsigned int _2; long unsigned int ix.1_4; : _2 = VIEW_CONVERT_EXPR(x_5(D)); ix.1_4 = _2 & 9223372036854775807; x_3 = VIEW_CONVERT_EXPR(ix.1_4); return x_3; so the issue might be as "simple" as that GIMPLE doesn't allow bit operations on FP operands. Which makes it a RTL missed optimization (to (and:DF ...)): (set (reg:DF 90 [ ]) (subreg:DF (and:DI (subreg:DI (reg/v:DF 91 [ x ]) 0) (const_int 9223372036854775807 [0x7fffffffffffffff])) 0)) unless RTL has the same restriction. And/or at target missed optimization in case it doesn't provide a AND instruction on DFmode (it doesn't as far as I can see).