[Bug translation/64905] New: unsigned short is loaded with 4-byte load (movl)

[Bug translation/64905] New: unsigned short is loaded with 4-byte load (movl)

[r.ayrapetyan at samsung dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

            Bug ID: 64905
           Summary: unsigned short is loaded with 4-byte load (movl)
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: translation
          Assignee: unassigned at gcc dot gnu.org
          Reporter: r.ayrapetyan at samsung dot com

Created attachment 34646
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34646&action=edit
Repro case source

Version, target:
  gcc version 5.0.0 20150128 (experimental)
  x86_64-unknown-linux-gnu

Issue:
  In some cases, uint16_t data element is read with 4-byte load (movl
instruction).

Repro case build string:
  gcc -g -Os \
      -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx \
      -ffixed-rdi -ffixed-rsi \
      -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 \
      -ffixed-r12 -ffixed-r13 -ffixed-r14 -ffixed-r15 \
      unaligned_read.c -o unaligned_read

Preliminary analysis:
  In the example, ffixed- options are passed to force pointer allocation on the
%rbp register.
  There is another real-world example without ffixed- options, where pointer
was allocated  on the %rbp register and that caused out-of-boundaries memory
access.
  1. The pointer to uint16_t data element was allocated on the %rbp register
     that is marked as aligned to STACK_BOUNDARY.
  2. get_attr_mode called from movhi_internal returns MODE_SI for the
instruction.

This can lead to the following problems:
  1. unaligned memory access (reduced performance);
  2. segmentation fault due to accessing unmapped page (or page mapped with
PROT_NONE)

     // mapped page with array of uint16_t | unmapped page
     function (&array [index_of_last_element_on_the_mapped_page]);
  3. memory access checkers complain about accessing memory out of allocated
array boundaries.

[Bug target/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

H.J. Lu <hjl.tools at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-02-02
                 CC|                            |ubizjak at gmail dot com
          Component|translation                 |target
   Target Milestone|---                         |5.0
     Ever confirmed|0                           |1

--- Comment #1 from H.J. Lu <hjl.tools at gmail dot com> ---
aligned_operand has

  if (MEM_ALIGN (op) >= 32)
    return true;

  op = XEXP (op, 0);

  /* Pushes and pops are only valid on the stack pointer.  */
  if (GET_CODE (op) == PRE_DEC
      || GET_CODE (op) == POST_INC)
    return true;

  /* Decode the address.  */
  ok = ix86_decompose_address (op, &parts);
  gcc_assert (ok);

  if (parts.base && GET_CODE (parts.base) == SUBREG)
    parts.base = SUBREG_REG (parts.base);
  if (parts.index && GET_CODE (parts.index) == SUBREG)
    parts.index = SUBREG_REG (parts.index);

  /* Look for some component that isn't known to be aligned.  */
  if (parts.index)
    {
      if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
        return false;
    }
  if (parts.base)
    {
      if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
        return false;
    }
  if (parts.disp)
    {
      if (!CONST_INT_P (parts.disp)
          || (INTVAL (parts.disp) & 3))
        return false;
    }

  /* Didn't find one -- this must be an aligned address.  */
  return true;

It returns true for

(mem:HI (reg/f:DI 6 bp [orig:90 *a_p_2(D) ] [90]) [2 *_3+0 S2 A16])

Why do we need to decompose address when we have MEM_ALIGN (op)?

[Bug target/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #2 from H.J. Lu <hjl.tools at gmail dot com> ---
Created attachment 34647
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34647&action=edit
A patch

Does this patch make any sense?

[Bug target/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #3 from H.J. Lu <hjl.tools at gmail dot com> ---
A patch is posted at

https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00093.html

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |law at redhat dot com
          Component|target                      |rtl-optimization

--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
It looks the failure is due to:

emit-rtl.c:  REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;

The testcase forces the pointer to %rbp (== HARD_FRAME_POINTER_REGNUM in the
above line), so the predicate thinks that the value in %rbp is aligned, since
%rbp has its REGNO_POINTER_ALIGN set to STACK_BOUNDARY.

Looks like generic RTL infrastructure problem to me, the
REGNO_POINTER_ALIGNMENT of hard_frame_pointer should be cleared when H_F_P is
omitted and reused.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?idd817

--- Comment #7 from Alexandre Oliva <aoliva at gcc dot gnu.org> ---
Author: aoliva
Date: Wed Feb  4 14:23:33 2015
New Revision: 220404

URL: https://gcc.gnu.org/viewcvs?rev"0404&root=gcc&view=rev
Log:
Avoid allocating memory when trying but failing to simplify XOR of AND.

for  gcc/ChangeLog

    PR debug/64817
    * simplify-rtx.c (simplify_binary_operation_1): Rewrite
    simplification of XOR of AND to not allocate new rtx before
    committing to a simplification.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/simplify-rtx.c

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

H.J. Lu <hjl.tools at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |vmakarov at redhat dot com

--- Comment #5 from H.J. Lu <hjl.tools at gmail dot com> ---
(In reply to Uroš Bizjak from comment #4)
> It looks the failure is due to:
> 
> emit-rtl.c:  REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) =
> STACK_BOUNDARY;
> 
> The testcase forces the pointer to %rbp (== HARD_FRAME_POINTER_REGNUM in the
> above line), so the predicate thinks that the value in %rbp is aligned,
> since %rbp has its REGNO_POINTER_ALIGN set to STACK_BOUNDARY.
> 
> Looks like generic RTL infrastructure problem to me, the
> REGNO_POINTER_ALIGNMENT of hard_frame_pointer should be cleared when H_F_P
> is omitted and reused.

Like this

diff --git a/gcc/ira.c b/gcc/ira.c
index ea2b69f..a7cf476 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -2313,6 +2313,8 @@ ira_setup_eliminable_regset (void)

   if (frame_pointer_needed)
     df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM, true);
+  else
+    REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;

   COPY_HARD_REG_SET (ira_no_alloc_regs, no_unit_alloc_regs);
   CLEAR_HARD_REG_SET (eliminable_regset);
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https://gcc.gnu.org/bugzilla/show_bug.cgi?idd935

Markus Trippelsdorf <trippels at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-02-04
                 CC|                            |mkuvyrkov at gcc dot gnu.org
   Target Milestone|---                         |5.0
     Ever confirmed|0                           |1

--- Comment #1 from Markus Trippelsdorf <trippels at gcc dot gnu.org> ---
Started with r220316.
Creduce came up with an invalid testcase. Re-reducing...

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[hjl at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #6 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> ---
Author: hjl
Date: Wed Feb  4 19:35:17 2015
New Revision: 220414

URL: https://gcc.gnu.org/viewcvs?rev=220414&root=gcc&view=rev
Log:
Clear hard frame pointer alignment if not needed

When hard frame pointer isn't needed, the register for hard frame pointer
may be reused.  This patch clears alignment on hard frame pointer if hard
frame pointer isn't needed.

gcc/

    PR rtl-optimization/64905
    * lra-eliminations.c (setup_can_eliminate): Clear hard frame
    pointer alignment if it isn't needed.

gcc/testsuite/

    PR rtl-optimization/64905
    * gcc.target/i386/pr64905.c: New file.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/testsuite/ChangeLog

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

H.J. Lu <hjl.tools at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |5.0
      Known to fail|                            |4.8.5, 4.9.3

--- Comment #7 from H.J. Lu <hjl.tools at gmail dot com> ---
Fixed in 5.0 so far.

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[dominiq at lps dot ens.fr]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #8 from Dominique d'Humieres <dominiq at lps dot ens.fr> ---
AFAICT only the ChangeLogs have been committed.

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #9 from H.J. Lu <hjl.tools at gmail dot com> ---
(In reply to Dominique d'Humieres from comment #8)
> AFAICT only the ChangeLogs have been committed.

Oops.  r220416 has it.

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[dominiq at lps dot ens.fr]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #10 from Dominique d'Humieres <dominiq at lps dot ens.fr> ---
Compiling the test gcc.target/i386/pr64905.c on x86_64-apple-darwin14 gives an
ICE

[Book15] f90/bug% gcc5 /opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c
-Os -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi
-ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 -ffixed-r13
-ffixed-r14 -ffixed-r15
/opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c: In function
'function':
/opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c:13:1: error: unable to
find a register to spill
 }
 ^
/opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c:13:1: error: this is
the insn:
(insn 9 14 12 2 (set (mem/c:HI (reg:DI 92) [2 a_global+0 S2 A16])
        (reg:HI 93 [orig:88 D.1985 ] [88]))
/opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c:12 92 {*movhi_internal}
     (expr_list:REG_DEAD (reg:HI 93 [orig:88 D.1985 ] [88])
        (expr_list:REG_DEAD (reg:DI 92)
            (nil))))
/opt/gcc/_clean/gcc/testsuite/gcc.target/i386/pr64905.c:13:1: internal compiler
error: in assign_by_spills, at lra-assigns.c:1383

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #11 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Dominique d'Humieres from comment #10)
> Compiling the test gcc.target/i386/pr64905.c on x86_64-apple-darwin14 gives
> an ICE

I have a patch that disables the test on -fPIC targets.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id`723

--- Comment #28 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
If this is about ccache, I wonder if ccache couldn't preprocess with
-fdirectives-only instead, that way hopefully no info is lost.

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[uros at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

--- Comment #12 from uros at gcc dot gnu.org ---
Author: uros
Date: Thu Feb  5 10:37:05 2015
New Revision: 220441

URL: https://gcc.gnu.org/viewcvs?rev=220441&root=gcc&view=rev
Log:
    PR rtl-optimization/64905
    * gcc.target/i386/pr64905.c: Require nonpic target.
    (dg-options): Add -fomit-frame-pointer.
    (main): Remove.


Modified:
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/i386/pr64905.c

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|5.0                         |5.2

--- Comment #13 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 5.1 has been released.

[Bug rtl-optimization/64905] unsigned short is loaded with 4-byte load (movl)

[r.ayrapetyan at samsung dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64905

Ruben Ayrapetyan <r.ayrapetyan at samsung dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #14 from Ruben Ayrapetyan <r.ayrapetyan at samsung dot com> ---
Verified on version 5.1.0.