From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 111798 invoked by alias); 17 Mar 2015 11:05:58 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 111711 invoked by uid 48); 17 Mar 2015 11:05:54 -0000 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/65078] [5 Regression] 4.9 and 5.0 generate more spill-fill in comparison with 4.8.2 Date: Tue, 17 Mar 2015 11:05:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 5.0 X-Bugzilla-Keywords: ra X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 5.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-03/txt/msg01680.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65078 Jakub Jelinek changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |uros at gcc dot gnu.org --- Comment #9 from Jakub Jelinek --- So, in *.optimized the changes are just 16 times a difference like: - _62 = __builtin_ia32_vec_ext_v2di (_63, 0); + _62 = BIT_FIELD_REF <_63, 64, 0>; And during expansion, the difference is: -;; _62 = __builtin_ia32_vec_ext_v2di (_63, 0); - -(insn 42 41 43 (set (reg:V2DI 329) - (subreg:V2DI (reg:V16QI 138 [ D.4823 ]) 0)) ./include/emmintrin.h:722 -1 - (nil)) - -(insn 43 42 44 (set (reg:DI 330) - (vec_select:DI (reg:V2DI 329) - (parallel [ - (const_int 0 [0]) - ]))) ./include/emmintrin.h:722 -1 - (nil)) - -(insn 44 43 0 (set (reg:DI 136 [ D.4825 ]) - (reg:DI 330)) ./include/emmintrin.h:722 -1 - (nil)) - -;; MEM[(long long int *)dest_268] = _62; - -(insn 45 44 0 (set (mem:DI (reg/v/f:SI 317 [ dest ]) [3 MEM[(long long int *)dest_268]+0 S8 A64]) - (reg:DI 136 [ D.4825 ])) ./include/emmintrin.h:722 -1 - (nil)) +;; MEM[(long long int *)dest_268] = _62; + +(insn 42 41 43 (set (reg:TI 329) + (subreg:TI (reg:V16QI 138 [ D.4825 ]) 0)) ./include/emmintrin.h:722 -1 + (nil)) +(insn 43 42 0 (set (mem:DI (reg/v/f:SI 317 [ dest ]) [3 MEM[(long long int *)dest_268]+0 S8 A64]) + (subreg:DI (reg:TI 329) 0)) ./include/emmintrin.h:722 -1 + (nil)) With the new storel_epi64 we get before RA: (insn 43 40 44 3 (set (mem:DI (reg/v/f:SI 317 [ dest ]) [3 MEM[(long long int *)dest_268]+0 S8 A64]) (subreg:DI (reg:V16QI 328) 0)) ./include/emmintrin.h:722 89 {*movdi_internal} (expr_list:REG_DEAD (reg:V16QI 328) (nil))) out of this, and not surprisingly the RA reloads it by storing the V16QI 328 into stack and loads back a DImode value, while with the old intrinsic before RA we have: (insn 45 43 46 3 (set (mem:DI (reg/v/f:SI 317 [ dest ]) [3 MEM[(long long int *)dest_268]+0 S8 A64]) (vec_select:DI (subreg:V2DI (reg:V16QI 328) 0) (parallel [ (const_int 0 [0]) ]))) ./include/emmintrin.h:722 3660 {*vec_extractv2di_0_sse} (expr_list:REG_DEAD (reg:V16QI 328) (nil))) and don't need to spill that. Now the question is if we can tell RA somehow (secondary reload) that to get a DImode lowpart subreg (and SImode too?) out of a vector register it can use the *vec_extractv2di_0_sse instruction for that. Or add !TARGET_64BIT pattern for storing a DImode lowpart subreg of a vector register (any mode there?) into memory? Or ensure that the BIT_FIELD_REF is expanded as the builtin used to be.