From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20235 invoked by alias); 16 Feb 2015 14:38:55 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 20219 invoked by uid 48); 16 Feb 2015 14:38:52 -0000 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/65078] [5.0 Regression] 4.9 and 5.0 generate more spill-fill in comparison with 4.8.2 Date: Mon, 16 Feb 2015 14:38:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 5.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_status cf_reconfirmed_on everconfirmed Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-02/txt/msg01763.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65078 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |NEW Last reconfirmed| |2015-02-16 Ever confirmed|0 |1 --- Comment #2 from Richard Biener --- Confirmed. 4.8 has _62 = MEM[(__m64 * {ref-all})dest_284]; _63 = VIEW_CONVERT_EXPR(_62); _64 = {_63, 0}; _65 = VIEW_CONVERT_EXPR(_64); _66 = __builtin_ia32_punpcklbw128 (_65, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }); _67 = VIEW_CONVERT_EXPR<__m128i>(_66); _68 = VIEW_CONVERT_EXPR(_67); _70 = __builtin_ia32_paddw128 (pretmp_327, _68); _71 = __builtin_ia32_packuswb128 (_70, _70); _72 = VIEW_CONVERT_EXPR<__m128i>(_71); _73 = __builtin_ia32_vec_ext_v2di (_72, 0); MEM[(long long int *)dest_284] = _73; while 5 _79 = MEM[(__m64 * {ref-all})dest_268]; _78 = VIEW_CONVERT_EXPR(_79); _77 = {_78, 0}; _74 = VIEW_CONVERT_EXPR(_77); _73 = __builtin_ia32_punpcklbw128 (_74, { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }); _69 = VIEW_CONVERT_EXPR(_73); _68 = _69 + pretmp_312; _67 = VIEW_CONVERT_EXPR(_68); _64 = __builtin_ia32_packuswb128 (_67, _67); _63 = VIEW_CONVERT_EXPR<__m128i>(_64); _62 = BIT_FIELD_REF <_63, 64, 0>; MEM[(long long int *)dest_268] = _62; so some intrinsics are no longer builtins. But the real difference is the following weird store sequence packuswb %xmm1, %xmm2 movaps %xmm2, (%esp) movl (%esp), %esi movl 4(%esp), %edi movl %esi, (%eax) movl %edi, 4(%eax) compared to just packuswb %xmm1, %xmm1 movq %xmm1, (%edx)