[Bug c/65082] New: Wasted cycles when using a register based varible

[Bug c/65082] New: Wasted cycles when using a register based varible

[NickParker at Eaton dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

            Bug ID: 65082
           Summary: Wasted cycles when using a register based varible
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: NickParker at Eaton dot com

gcc version 4.8.0 20130306 (experimental) (GCC) 

Was just playing around and found this.  When using a register based variable,
the compiler misses an obvious optimisation.  

Notice in code below the addition does not take place 'in place' and is instead
performed in scratch/temporary registers and then shifted back to "phaseAccPh".
 Why not just add directly to "phaseAccPh" since in this case it IS register
based already.  It seems that GCC "thinks" that the variable is still in SRAM
or something else.....
Nick.




c code:
---------------------------------------------------------
register uint16_t phaseAccPh  asm ("r4");
uint16_t phaseAccFr;

phaseAccPh += phaseAccFr;



asm code:
---------------------------------------------------------
  40:pll.c         **** void pllExec(void)
  41:pll.c         **** {
  15                       .loc 1 41 0
  16                       .cfi_startproc
  17                   /* prologue: function */
  18                   /* frame size = 0 */
  19                   /* stack size = 0 */
  20                   .L__stack_usage = 0
  42:pll.c         ****   int16_t mix_output_s2;
  43:pll.c         ****   phaseAccPh += phaseAccFr;
  21                       .loc 1 43 0
  22 0000 E091 0000         lds r30,phaseAccFr
  23 0004 F091 0000         lds r31,phaseAccFr+1
  24 0008 E40D              add r30,r4
  25 000a F51D              adc r31,r5
  26 000c 2F01              movw r4,r30

[Bug middle-end/65082] Wasted cycles when using a register based varible

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Related to bug 44281 and bug 42596.

[Bug middle-end/65082] Wasted cycles when using a register based varible

[gjl at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

Georg-Johann Lay <gjl at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|AVR-GCC                     |avr
           Priority|P3                          |P5
             Status|UNCONFIRMED                 |WAITING
   Last reconfirmed|                            |2015-02-20
     Ever confirmed|0                           |1

--- Comment #2 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
This cannot be reproduced with

register unsigned r4 asm ("r4");
extern unsigned x;

void f (void)
{
    r4 += x;
}


and compiled with

$ avr-gcc prog.c -S -Os


Neither with 4.8 nor 4.9 nor 5.0:  In all cases, the generated code is:

f:
    lds r24,x
    lds r25,x+1
    add r4,r24
    adc r5,r25
    ret


(In reply to NickParker from comment #0)

> c code:
> ---------------------------------------------------------
> register uint16_t phaseAccPh  asm ("r4");
> uint16_t phaseAccFr;
> 
> phaseAccPh += phaseAccFr;

This is not C code that can be compiled.  Please read the bug reporting
instructions again.

https://gcc.gnu.org/bugs/#report

[Bug middle-end/65082] Wasted cycles when using a register based varible

[NickParker at Eaton dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

--- Comment #3 from NickParker at Eaton dot com ---

register uint16_t r4 asm ("r4");
register uint16_t r6 asm ("r6");
volatile int8_t localOscCosine;
volatile int8_t acInput;

void pllExec(void)
{
  int16_t mix_output_s2=0;
  r4 += r6;
  localOscCosine = pgm_read_byte(&cosine7b[r4 >> 8]);
  mix_output_s2 = (localOscCosine * acInput); // GCC-AVR it give 16-bits....
};


---------------------------------------
results in.....


void pllExec(void)
  39:pll.c         **** {
  15                       .loc 1 39 0
  16                       .cfi_startproc
  17                   /* prologue: function */
  18                   /* frame size = 0 */
  19                   /* stack size = 0 */
  20                   .L__stack_usage = 0
  21                   .LVL0:
  40:pll.c         ****   //int16_t ss;
  41:pll.c         ****   int16_t mix_output_s2=0;
  42:pll.c         ****   r4 += r6;
  22                       .loc 1 42 0
  23 0000 F301              movw r30,r6
  24 0002 E40D              add r30,r4
  25 0004 F51D              adc r31,r5
  26 0006 2F01              movw r4,r30
  27                   .LVL1:
  28                   .LBB2:

[Bug middle-end/65082] Wasted cycles when using a register based varible

[NickParker at Eaton dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

--- Comment #4 from NickParker at Eaton dot com ---
That was with 's' optimisation, and it does the sames for optimisation level
'1'.

[Bug middle-end/65082] Wasted cycles when using a register based varible

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|WAITING                     |NEW

--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Reduced testcase:
```
typedef unsigned short uint16_t;


register uint16_t r4 asm ("r4");
register uint16_t r6 asm ("r6");

uint16_t pllExec(void)
{
  r4 += r6;
  return r4>>8;
};
```

We get:
        mov r24,r4
        mov r25,r5
        add r24,r6
        adc r25,r7
        mov r4,r24
        mov r5,r25
        mov r24,r25
        ldi r25,0

[Bug middle-end/65082] Wasted cycles when using a register based varible

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
See bug 43491 comment #12 for some analysis of this issue really.

[Bug middle-end/65082] Wasted cycles when using a register based varible

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65082

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |DUPLICATE
             Status|NEW                         |RESOLVED

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Same as PR 56439.

*** This bug has been marked as a duplicate of bug 56439 ***