From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 102849 invoked by alias); 9 Mar 2015 16:26:03 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 101212 invoked by uid 48); 9 Mar 2015 16:25:58 -0000 From: "meissner at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/65242] [5 Regression] ICE (in gen_add2_insn, at optabs.c:4761) on powerpc64le-linux-gnu Date: Mon, 09 Mar 2015 16:26:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 5.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: meissner at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: meissner at gcc dot gnu.org X-Bugzilla-Target-Milestone: 5.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-03/txt/msg00971.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65242 --- Comment #8 from Michael Meissner --- I'm going to start looking at this. I suspect the issue is we need more checks about the offset in TOC references. In particular, the 64-bit GPR load/store instruction (ld, std), the sign-extended 32-bit load (lwa), and 128-bit load/store (lq, stq) are B-form instructions instead of D-form, meaning that the bottom 2 bits of the offset are required to be zero, and the encoding uses these bits for other purposes.