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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/65505] [5 Regression][SH] ICE in sh_disp_addr_displacement
Date: Sat, 21 Mar 2015 15:59:00 -0000	[thread overview]
Message-ID: <bug-65505-4-7Rf1Q6amyM@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-65505-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65505

--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Created attachment 35084
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35084&action=edit
possible patch

The problem here is that sh_disp_addr_displacement gets an address that looks
like:
(plus:SI (subreg:SI (reg:DI ...) ..) (const_int ...)

The predicates displacement_mem_operand and simple_mem_operand use
arith_reg_operand to match the register operand.  This also matches sign_extend
and subreg, which is not handled by constraints such as Sdd.

This is a latent problem, although it seems it never triggered on 4.8 and 4.9.

If we allow subregs for the register operand of address expressions, things get
a bit hairy.  Additional checks need to be added everywhere to make sure that
the subreg is indeed a register operand and not e.g. subreg (mem ...). 
Disallowing subregs in address expressions seems easier in this case.

The attached patch fixes the problem.


  reply	other threads:[~2015-03-21 15:24 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-21 15:24 [Bug target/65505] New: " olegendo at gcc dot gnu.org
2015-03-21 15:59 ` olegendo at gcc dot gnu.org [this message]
2015-03-21 16:00 ` [Bug target/65505] " olegendo at gcc dot gnu.org
2015-03-21 17:23 ` olegendo at gcc dot gnu.org
2015-03-23  0:35 ` kkojima at gcc dot gnu.org
2015-03-23  9:56 ` rguenth at gcc dot gnu.org
2015-03-23 19:52 ` olegendo at gcc dot gnu.org
2015-03-23 20:04 ` olegendo at gcc dot gnu.org

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