From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 86827 invoked by alias); 27 Mar 2015 19:43:51 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 86772 invoked by uid 48); 27 Mar 2015 19:43:47 -0000 From: "tom at honermann dot net" To: gcc-bugs@gcc.gnu.org Subject: [Bug c++/65575] [c++-concepts] Parse error for requires clause on functions that return a reference type Date: Fri, 27 Mar 2015 20:43:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: c++ X-Bugzilla-Version: unknown X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: tom at honermann dot net X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-03/txt/msg03253.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D65575 --- Comment #5 from Tom Honermann --- r221733 seems to address the case in comment 2 for me. I have one more for you. This one is a little different (no return type involved), so let me know if you want me to open a different bug for it. $ cat t3.cpp=20 struct S { S() =3D default requires true; }; $ svn info # From my local svn gcc repo. Path: . URL: svn://gcc.gnu.org/svn/gcc/branches/c++-concepts Repository Root: svn://gcc.gnu.org/svn/gcc Repository UUID: 138bc75d-0d04-0410-961f-82ee72b054a4 Revision: 221742 Node Kind: directory Schedule: normal Last Changed Author: asutton Last Changed Rev: 221733 Last Changed Date: 2015-03-27 10:44:22 -0400 (Fri, 27 Mar 2015) $ g++ -c -std=3Dc++1z t3.cpp=20 t3.cpp:2:11: error: expected =E2=80=98;=E2=80=99 at end of member declarati= on S() =3D default requires true; ^ t3.cpp:2:19: error: expected unqualified-id before =E2=80=98requires=E2=80= =99 S() =3D default requires true; ^ >>From gcc-bugs-return-482110-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Fri Mar 27 20:13:46 2015 Return-Path: Delivered-To: listarch-gcc-bugs@gcc.gnu.org Received: (qmail 53912 invoked by alias); 27 Mar 2015 20:13:45 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Delivered-To: mailing list gcc-bugs@gcc.gnu.org Received: (qmail 53709 invoked by uid 48); 27 Mar 2015 20:13:40 -0000 From: "wschmidt at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/65456] powerpc64le autovectorized copy loop missed optimization Date: Fri, 27 Mar 2015 21:12:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 5.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: wschmidt at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: wschmidt at gcc dot gnu.org X-Bugzilla-Target-Milestone: 6.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-03/txt/msg03254.txt.bz2 Content-length: 1132 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65456 --- Comment #12 from Bill Schmidt --- The problem is this declaration in rs6000.h, which forces unaligned vector stores to be scalarized during expand: /* Define this macro to be the value 1 if unaligned accesses have a cost many times greater than aligned accesses, for example if they are emulated in a trap handler. */ /* Altivec vector memory instructions simply ignore the low bits; SPE vector memory instructions trap on unaligned accesses; VSX memory instructions are aligned to 4 or 8 bytes. */ #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ (STRICT_ALIGNMENT \ || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ || (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode) \ && (ALIGN) < 32) \ || (VECTOR_MODE_P ((MODE)) && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))) The last condition needs to be relaxed for POWER8 hardware.