From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 72973 invoked by alias); 4 Apr 2015 04:57:35 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 72946 invoked by uid 48); 4 Apr 2015 04:57:31 -0000 From: "jamrial at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/65671] New: Assembly failure (invalid register operand) with -O3 -mavx512vl Date: Sat, 04 Apr 2015 04:57:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 5.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: jamrial at gmail dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-04/txt/msg00253.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65671 Bug ID: 65671 Summary: Assembly failure (invalid register operand) with -O3 -mavx512vl Product: gcc Version: 5.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: jamrial at gmail dot com https://raw.githubusercontent.com/foo86/dcadec/e884d9a0d9127528bdc47c1f8db392363fb50876/libdcadec/idct_float.c gcc -O3 -mavx512f -mavx512vl -c -o libdcadec/idct_float.o libdcadec/idct_float.c /tmp/cc3BQBvH.s: Assembler messages: /tmp/cc3BQBvH.s:1602: Error: invalid register operand for `vextractf128' /tmp/cc3BQBvH.s:1624: Error: invalid register operand for `vextractf128' /tmp/cc3BQBvH.s:1670: Error: invalid register operand for `vextractf128' Lines in question from the resulting assembly file 1602: vextractf128 $0x1, %ymm20, 144(%rdx) 1624: vextractf128 $0x1, %ymm24, 272(%rdx) 1670: vextractf128 $0x1, %ymm19, 400(%rdx) GCC 5.0.0 (20150329 snapshot) on x86_64-unknown-linux-gnu. Works fine with -mavx512f alone, so sounds like the assembler is trying to use VEX coding scheme with the new registers instead of EVEX.