[Bug c/65783] New: after reload, the memrefs_conflict_p is unreliable?

[Bug c/65783] New: after reload, the memrefs_conflict_p is unreliable?

[wangjiefeng at huawei dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65783

            Bug ID: 65783
           Summary: after reload, the memrefs_conflict_p is unreliable?
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: wangjiefeng at huawei dot com

int f = -1;
int foo(int * pa)
{
  int a = 1;
  *(pa) = a;
  pa = pa + f;
  a = *(pa + 1);
  return a;
}

With -O2, the ARM's assembler is as follows:
foo:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        movw    r3, #:lower16:.LANCHOR0 @ 20    *arm_movsi_insn/4       [length
= 4]
        mov     r2, #1  @ 6     *arm_movsi_insn/2       [length = 4]
        movt    r3, #:upper16:.LANCHOR0 @ 21    *arm_movt       [length = 4]
        str     r2, [r0]        @ 7     *arm_movsi_insn/6       [length = 4]
        ldr     r3, [r3]        @ 9     *arm_movsi_insn/5       [length = 4]
        add     r0, r0, r3, asl #2      @ 11    *arith_shiftsi/1        [length
= 4]
        ldr     r0, [r0, #4]    @ 17    *arm_movsi_insn/5       [length = 4]
        bx      lr      @ 26    *arm_return     [length = 12]
        .size   foo, .-foo
        .global f
        .data
        .align  2

In sched1, insn 7 and insn 17 has true dependence, but in sched2, the true
dependence between insn 7 and insn 17 is omitted.
It seems after reload, in function true_dependence_1, the memrefs_conflict_p is
unreliable?

[Bug rtl-optimization/65783] after reload, the memrefs_conflict_p is unreliable?

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65783

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
*** Bug 65784 has been marked as a duplicate of this bug. ***

[Bug rtl-optimization/65783] after reload, the memrefs_conflict_p is unreliable?

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65783

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
How does the RTL look like after reload?

[Bug rtl-optimization/65783] after reload, the memrefs_conflict_p is unreliable?

[wangjiefeng at huawei dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65783

--- Comment #3 from Jason <wangjiefeng at huawei dot com> ---
when sched1 the RTL is as follows:
(note 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 3 4 10 2 NOTE_INSN_FUNCTION_BEG)
(note 10 3 12 2 NOTE_INSN_DELETED)
(note 12 10 20 2 NOTE_INSN_DELETED)
(insn 20 12 2 2 (set (reg/f:SI 119)
        (high:SI (symbol_ref:SI ("*.LANCHOR0") [flags 0x182]))) tmp.c:7 196
{*arm_movsi_insn}
     (nil))
(insn 2 20 21 2 (set (reg/v/f:SI 116 [ pa ])
        (reg:SI 0 r0 [ pa ])) tmp.c:4 196 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg:SI 0 r0 [ pa ])
        (nil)))
(insn 21 2 6 2 (set (reg/f:SI 119)
        (lo_sum:SI (reg/f:SI 119)
            (symbol_ref:SI ("*.LANCHOR0") [flags 0x182]))) tmp.c:7 195
{*arm_movt}
     (expr_list:REG_EQUAL (symbol_ref:SI ("*.LANCHOR0") [flags 0x182])
        (nil)))
(insn 6 21 7 2 (set (reg:SI 117)
        (const_int 1 [0x1])) tmp.c:6 196 {*arm_movsi_insn}
     (nil))
(insn 7 6 9 2 (set (mem:SI (reg/v/f:SI 116 [ pa ]) [1 *pa_2(D)+0 S4 A32])
        (reg:SI 117)) tmp.c:6 196 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg:SI 117)
        (nil)))
(insn 9 7 11 2 (set (reg:SI 120 [ f ])
        (mem/c:SI (reg/f:SI 119) [1 f+0 S4 A32])) tmp.c:7 196 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg/f:SI 119)
        (nil)))
(insn 11 9 17 2 (set (reg/f:SI 121)
        (plus:SI (mult:SI (reg:SI 120 [ f ])
                (const_int 4 [0x4]))
            (reg/v/f:SI 116 [ pa ]))) tmp.c:8 283 {*arith_shiftsi}
     (expr_list:REG_DEAD (reg:SI 120 [ f ])
        (expr_list:REG_DEAD (reg/v/f:SI 116 [ pa ])
            (nil))))
(insn 17 11 18 2 (set (reg/i:SI 0 r0)
        (mem:SI (plus:SI (reg/f:SI 121)
                (const_int 4 [0x4])) [1 MEM[(int *)pa_7 + 4B]+0 S4 A32]))
tmp.c:10 196 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg/f:SI 121)
        (nil)))
(insn 18 17 22 2 (use (reg/i:SI 0 r0)) tmp.c:10 -1
     (nil))

when sched2 the RTL is as follows:
(note 4 1 24 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 24 4 3 2 NOTE_INSN_PROLOGUE_END)
(note 3 24 10 2 NOTE_INSN_FUNCTION_BEG)
(note 10 3 12 2 NOTE_INSN_DELETED)
(note 12 10 20 2 NOTE_INSN_DELETED)
(insn:TI 20 12 6 2 (set (reg/f:SI 3 r3 [119])
        (high:SI (symbol_ref:SI ("*.LANCHOR0") [flags 0x182]))) tmp.c:7 196
{*arm_movsi_insn}
     (expr_list:REG_EQUAL (high:SI (symbol_ref:SI ("*.LANCHOR0") [flags
0x182]))
        (nil)))
(insn 6 20 21 2 (set (reg:SI 2 r2 [117])
        (const_int 1 [0x1])) tmp.c:6 196 {*arm_movsi_insn}
     (expr_list:REG_EQUIV (const_int 1 [0x1])
        (nil)))
(insn:TI 21 6 7 2 (set (reg/f:SI 3 r3 [119])
        (lo_sum:SI (reg/f:SI 3 r3 [119])
            (symbol_ref:SI ("*.LANCHOR0") [flags 0x182]))) tmp.c:7 195
{*arm_movt}
     (expr_list:REG_EQUAL (symbol_ref:SI ("*.LANCHOR0") [flags 0x182])
        (nil)))
(insn 7 21 9 2 (set (mem:SI (reg/v/f:SI 0 r0 [orig:116 pa ] [116]) [1
*pa_2(D)+0 S4 A32])
        (reg:SI 2 r2 [117])) tmp.c:6 196 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg:SI 2 r2 [117])
        (nil)))
(insn:TI 9 7 11 2 (set (reg:SI 3 r3 [orig:120 f ] [120])
        (mem/c:SI (reg/f:SI 3 r3 [119]) [1 f+0 S4 A32])) tmp.c:7 196
{*arm_movsi_insn}
     (nil))
(insn:TI 11 9 17 2 (set (reg/f:SI 0 r0 [121])
        (plus:SI (mult:SI (reg:SI 3 r3 [orig:120 f ] [120])
                (const_int 4 [0x4]))
            (reg/v/f:SI 0 r0 [orig:116 pa ] [116]))) tmp.c:8 283
{*arith_shiftsi}
     (expr_list:REG_DEAD (reg:SI 3 r3 [orig:120 f ] [120])
        (nil)))
(insn:TI 17 11 18 2 (set (reg/i:SI 0 r0)
        (mem:SI (plus:SI (reg/f:SI 0 r0 [121])
                (const_int 4 [0x4])) [1 MEM[(int *)pa_7 + 4B]+0 S4 A32]))
tmp.c:10 196 {*arm_movsi_insn}
     (nil))
(insn 18 17 26 2 (use (reg/i:SI 0 r0)) tmp.c:10 -1
     (nil))
(jump_insn:TI 26 18 25 2 (return) tmp.c:10 268 {*arm_return}
     (nil)
 -> return)
(In reply to Richard Biener from comment #2)
> How does the RTL look like after reload?