From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 100749 invoked by alias); 23 Apr 2015 16:04:30 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 100683 invoked by uid 48); 23 Apr 2015 16:04:27 -0000 From: "robert.suchanek at imgtec dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/65862] New: [MIPS] IRA/LRA issue: integers spilled to floating-point registers Date: Thu, 23 Apr 2015 16:04:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 5.1.1 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: robert.suchanek at imgtec dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter cc Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-04/txt/msg02044.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65862 Bug ID: 65862 Summary: [MIPS] IRA/LRA issue: integers spilled to floating-point registers Product: gcc Version: 5.1.1 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: robert.suchanek at imgtec dot com CC: matthew.fortune at imgtec dot com, vmakarov at redhat dot com, wdijkstr at arm dot com Following up the following thread: https://gcc.gnu.org/ml/gcc/2015-04/msg00239.html Here is a reduced testcase from the Linux kernel: $ cat sort.c int a, c; int *b; void fn1(int p1, int *p2(void *, void *), void *p3(void *, void *, int)) { int n = c; for (;;) { a = 1; for (; a < n;) { p1 && p2(0, (int *) (p1 + 1)); p3(0, b + p1, 0); } } } Spill/reload to/from FP reg should be triggerable with (tested on SVN rev. 222257): $ mips-img-linux-gnu -mips32r6 -O2 sort.c Because of ALL_REGS assigned to most of allocnos, LRA uses FP regs freely. The class is preferred because of the equal cost between registers and memory. This likely happened because of the following fix: 2011-12-20 Vladimir Makarov PR target/49865 * ira-costs.c (find_costs_and_classes): Prefer registers even if the memory cost is the same. As Matthew already pointed out, one way to prevent this is through increasing the cost of moving between GP and FP registers for integral modes. I briefly tested out Wilco's patch but it did not appear to have the same effect as changing the cost and I've seen a few ICEs when building the kernel.