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From: "alalaw01 at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/65952] [AArch64] Will not vectorize storing induction of pointer addresses for LP64 Date: Fri, 01 May 2015 09:52:00 -0000 [thread overview] Message-ID: <bug-65952-4-hX9BG2AYCX@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-65952-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65952 --- Comment #4 from alalaw01 at gcc dot gnu.org --- Hmmm. Yes. Well, x * 16 = x << 4, of course. Or, in theory something like VRP could let us see that # i_12 = PHI <i_9(4), 0(2)> # ivtmp_18 = PHI <ivtmp_17(4), 4(2)> _5 = (long unsigned int) i_12; _6 = _5 * 16; _7 = pretmp_11 + _6; ptrs[i_12] = _7; i_9 = i_12 + 1; could be rewritten to something like # i_12 = PHI <i_9(4), 0(2)> # ivtmp_18 = PHI <ivtmp_17(4), 4(2)> _5 = _12 * 16; _6 = (long unsigned int) _5; _7 = pretmp_11 + _6; ptrs[i_12] = _7; i_9 = i_12 + 1; which would then be vectorizable.
next prev parent reply other threads:[~2015-05-01 9:52 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-04-30 17:41 [Bug target/65952] New: [AArch64] Will not vectorize copying pointers alalaw01 at gcc dot gnu.org 2015-04-30 18:46 ` [Bug target/65952] [AArch64] Will not vectorize storing induction of pointer addresses pinskia at gcc dot gnu.org 2015-04-30 18:48 ` pinskia at gcc dot gnu.org 2015-04-30 20:34 ` [Bug target/65952] [AArch64] Will not vectorize storing induction of pointer addresses for LP64 pinskia at gcc dot gnu.org 2015-05-01 9:52 ` alalaw01 at gcc dot gnu.org [this message] 2015-06-17 12:59 ` alalaw01 at gcc dot gnu.org 2015-06-17 13:19 ` rguenth at gcc dot gnu.org 2015-06-17 13:21 ` alalaw01 at gcc dot gnu.org 2015-06-17 13:22 ` alalaw01 at gcc dot gnu.org 2015-07-20 10:30 ` vekumar at gcc dot gnu.org 2015-08-10 7:05 ` vekumar at gcc dot gnu.org
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