From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 47033 invoked by alias); 9 Jun 2015 09:08:35 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 46970 invoked by uid 48); 9 Jun 2015 09:08:31 -0000 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/66470] New: [4.8/4.9/5/6 Regression] TLS ICE due to ix86_split_long_move Date: Tue, 09 Jun 2015 09:08:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 5.1.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-06/txt/msg00790.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66470 Bug ID: 66470 Summary: [4.8/4.9/5/6 Regression] TLS ICE due to ix86_split_long_move Product: gcc Version: 5.1.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: jakub at gcc dot gnu.org Target Milestone: --- extern __thread unsigned long long a[10]; unsigned long long foo (int b) { return a[b]; } or extern __thread struct S { int a, b; } a[10]; struct S foo (int b) { return a[b]; } ICE on x86_64-linux/i686-linux with -m32, all optimization levels. This worked in GCC 3.3.6. The bug is in ix86_split_long_move, when trying to split: (insn 7 15 13 2 (set (reg:DI 0 ax [92]) (mem:DI (plus:SI (plus:SI (mult:SI (reg/v:SI 1 dx [orig:89 b ] [89]) (const_int 8 [0x8])) (unspec:SI [ (const_int 0 [0]) ] UNSPEC_TP)) (reg:SI 0 ax [91])) [1 a S8 A64])) rh1212265.i:2 85 {*movdi_internal} (nil)) which, while offsettable, has collisions == 2 (the MEM uses both dx and ax in the addressing and loads the ax:dx pair). The splitter assumes it can just use a lea, but lea can't support %gs: (UNSPEC_TP). So, either it has to load from %gs:0 first, then do lea, or better yet just move UNSPEC_TP part to the individual memory loads.