[Bug target/66697] Feature request: -mstackrealign and force_align_arg_pointer for x86_64

["ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66697

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Justas L from comment #4)
> I haven't tested this yet, but I understand this global solution would
> affect the performance of ALL functions, not only those that interface with
> outside code, correct?

Yes, but you can always move critical functions to a separate file and compile
them with special options.

> Wine already assigns the force_align_arg_pointer attribute to vulnerable
> functions, so making it work for x86_64 would be the better, less disruptive
> solution.

TBH, I really don't see the reason against force_align_arg_pointer support on
x86_64. I have a patch in testing that enables this attribute also for x86_64
targets.
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Subject: [Bug target/66697] Feature request: -mstackrealign and force_align_arg_pointer for x86_64
Date: Mon, 05 Oct 2015 09:09:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66697

--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
Created attachment 36445
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36445&action=edit
Patch that enables force_align_arg_pointer attribute for x86_64 targets
>From gcc-bugs-return-498761-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Mon Oct 05 09:42:10 2015
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Subject: [Bug other/67841] error: unable to find a register to spill if all registers are callee-saved
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67841

--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to H.J. Lu from comment #6)
> ix86_expand_prologue in i386.c has
> 
>       /* The computation of the size of the re-aligned stack frame means
>          that we must allocate the size of the register save area before
>          performing the actual alignment.  Otherwise we cannot guarantee
>          that there's enough storage above the realignment point.  */
> 
> That is where unaligned SSE load/store in prologue come from.

We can also use this code for interrupt handler.
>From gcc-bugs-return-498762-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Mon Oct 05 09:57:44 2015
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Subject: [Bug middle-end/67821] [5/6 Regression] ICE in duplicate_ssa_name_range_info
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https://gcc.gnu.org/bugzilla/show_bug.cgi?idg821

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P1
      Known to work|                            |5.2.0