[Bug rtl-optimization/67028] New: combine bug. Different assumptions about subreg in different places.

[Bug rtl-optimization/67028] New: combine bug. Different assumptions about subreg in different places.

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

            Bug ID: 67028
           Summary: combine bug. Different assumptions about subreg in
                    different places.
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: renlin at gcc dot gnu.org
  Target Milestone: ---

Created attachment 36067
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36067&action=edit
test case

This is a combine bug manifest on arm target. A test case is attached.

The expected output of the test case should be:
checksum = 1

However, with the following command line:

arm-none-eabi-gcc -march=armv7-a -O3 test.c -specs=rdimon.specs -o a.out

the output is:
checksum = 0

It generates wrong code when the optimization level is: -O2, -O3, -Os
-O0, -O1 works fine.

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |segher at gcc dot gnu.org

--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
I have a hard time reproducing this.  Could you show the generated
assembler code, and say why you think it is a combine bug?

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

--- Comment #2 from renlin at gcc dot gnu.org ---
(In reply to Segher Boessenkool from comment #1)
> I have a hard time reproducing this.  Could you show the generated
> assembler code, and say why you think it is a combine bug?

This is my generated asm with this command "cc1 -O3 -march=armv7-a test.c"

        stmfd   sp!, {r4, lr}
        mov     r1, #0
        movw    r0, #:lower16:.LC0
        movt    r0, #:upper16:.LC0
        bl      printf
        mov     r0, #0
        ldmfd   sp!, {r4, pc}


In simplify_comparison(), for the following rtx pattern,

and:M1 (subreg:M2 X 0) (const_int C1))

the code will try to permute the SUBREG and AND when WORD_REGISTER_OPERATIONS
is defined and the subreg here is Paradoxical. There is an assumption here: the
upper bits of the subreg should all be zeros.

However, this is not always true. In this particular test case, the AND
operation, which ensures the higher bits are zero, is removed. The register
here has two CONST_INT values in a if-then-else pattern. When further
simplifying this if-then-else pattern, subreg is applied to those two CONST_INT
value.

In simplify_immed_subreg, CONST_INT is always signed extended to a larger mode.
The different assumptions cause the wrong code-generation.


What's more, in the gcc internal documentation, it's written: "subregs of
subregs are not supported"
However, "subreg of subreg" pattern will be generated by combine pass, and
simplified by simplify_subreg().

For example:
subreg:SI (subreg:HI reg:SI r10) ----> reg:SI r10

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-07-27
     Ever confirmed|0                           |1

--- Comment #3 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Ah, the -march= does the trick.  Confirmed.

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[notasas at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

notasas at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |notasas at gmail dot com

--- Comment #5 from notasas at gmail dot com ---
gcc 4.7.2, 4.8.2, 4.9.3 are also affected.

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

--- Comment #6 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Author: segher
Date: Sat Aug  8 01:51:27 2015
New Revision: 226731

URL: https://gcc.gnu.org/viewcvs?rev=226731&root=gcc&view=rev
Log:
        PR rtl-optimization/67028
        * combine.c (simplify_comparison): Fix comment.  Rearrange code.
        Add test to see if a const_int fits in the new mode.

gcc/testsuite/
        PR rtl-optimization/67028
        * gcc.dg/pr67028.c: New testcase.

Added:
    trunk/gcc/testsuite/gcc.dg/pr67028.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/combine.c
    trunk/gcc/testsuite/ChangeLog

[Bug rtl-optimization/67028] combine bug. Different assumptions about subreg in different places.

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67028

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #9 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Fixed on all release branches.