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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/67325] Optimize shift (aka subreg) of load to simple
 load
Date: Tue, 28 May 2024 22:59:24 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D67325

--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:1d6199e5f8c1c08083eeb0279f71333234fe14ad

commit r15-882-g1d6199e5f8c1c08083eeb0279f71333234fe14ad
Author: liuhongt <hongtao.liu@intel.com>
Date:   Mon Feb 19 13:57:24 2024 +0800

    Reduce cost of MEM (A + imm).

    For MEM, rtx_cost iterates each subrtx, and adds up the costs,
    so for MEM (reg) and MEM (reg + 4), the former costs 5,
    the latter costs 9, it is not accurate for x86. Ideally
    address_cost should be used, but it reduce cost too much.
    So current solution is make constant disp as cheap as possible.

    gcc/ChangeLog:

            PR target/67325
            * config/i386/i386.cc (ix86_rtx_costs): Reduce cost of MEM (A
            + imm) to "cost of MEM (A)" + 1.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr67325.c: New test.=