[Bug target/67366] Poor assembly generation for unaligned memory accesses on ARM v6 & v7 cpus

["ramana at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

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                 CC|                            |ramana at gcc dot gnu.org

--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
(In reply to Richard Earnshaw from comment #2)
> (In reply to Richard Biener from comment #1)
> > I think this boils down to the fact that memcpy expansion is done too late
> > and
> > that (with more recent GCC) the "inlining" done on the GIMPLE level is
> > restricted
> > to !SLOW_UNALIGNED_ACCESS but arm defines STRICT_ALIGNMENT to 1
> > unconditionally.
> > 
> 
> Yep, we have to define STRICT_ALIGNMENT to 1 because not all load
> instructions work with misaligned addresses (ldm, for example).  The only
> way to handle misaligned copies is through the movmisalign API.

Hmmm, actually that's not completely true - for SImode and HImode objects there
don't appear to be movmisalign interfaces. For things like memcpy this is done
through the memcpy interface where we end up generating copies using
unaligned_loadsi and unaliged_storesi.

We may need to experiment a bit with the movmisalign interface too.


Ramana