From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 99319 invoked by alias); 27 Aug 2015 14:45:58 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 99108 invoked by uid 48); 27 Aug 2015 14:45:53 -0000 From: "ramana at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/67366] Poor assembly generation for unaligned memory accesses on ARM v6 & v7 cpus Date: Thu, 27 Aug 2015 14:45:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 6.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: ramana at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-08/txt/msg01881.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366 --- Comment #11 from Ramana Radhakrishnan --- (In reply to rguenther@suse.de from comment #10) > On Thu, 27 Aug 2015, rearnsha at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366 > > > > --- Comment #9 from Richard Earnshaw --- > > Does that really do the right thing? That is, does force_reg understand a > > misaligned memory op? In practice I think yes. > > > > Also, what if one memory operand is aligned, but the other not? Don't we want > > to have the right combination of aligned/misaligned instructions? > > I think you never get two MEMs, you at most get a constant on the > RHS of a store. Yep that's my understanding too. movmisalign has stricter rules compared to mov so we have to handle some of these carefully. The logic in here is essentially from neon.md : movmisalign, so some of it may not be relevant here in the scalar case, but it's probably better to be a bit defensive here. I tried playing with the HImode case but the pain I had was with the fact that HImode movmisalign expects a load into a HImode register and I hadn't got my head around that given other things I needed to finish up before leaving.