public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug middle-end/67718] New: [aarch64] long double incorrect code for copysign
@ 2015-09-25 19:24 thanm at google dot com
  2015-09-25 23:31 ` [Bug target/67718] " pinskia at gcc dot gnu.org
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: thanm at google dot com @ 2015-09-25 19:24 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67718

            Bug ID: 67718
           Summary: [aarch64] long double incorrect code for copysign
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: thanm at google dot com
  Target Milestone: ---

Created attachment 36392
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36392&action=edit
reduced test case (C++)

Compiling the attached example with g++ at -O2 or -O1 results in incorrect code
(-O0 looks ok). This is with gcc trunk aarch64-linux-android target; problem is
also present in 4.9.  Source being compiled looks like:

/// begin
union IEEEl2bits {
  long double e;
  struct {
    unsigned long manl  :64;
    unsigned long manh  :48;
    unsigned int  exp   :15;
    unsigned int  sign  :1;
  } bits;
};

long double
copysignl(long double x, long double y)
{
  union IEEEl2bits ux, uy;
  ux.e = x;
  uy.e = y;
  ux.bits.sign = uy.bits.sign;
  return (ux.e);
}
/// end

Here is -O2 assembly:

        ushr    d1, d1, 63
        fmov    x0, d0
        fmov    x1, v0.d[1]
        fmov    d0, x0
        fmov    x2, d1
        bfi     x1, x2, 63, 1
        fmov    v0.d[1], x1
        ret

Note that the first instruction is sourcing d1 (incorrect) -- this needs to
read q0 in order for correct semantics.

I am not a gcc expert, but I'm guessing that the problem is happening in the
reload phase. Prior to reload the RTL looks ok:

(insn 10 9 7 2 (set (reg:DI 81 [ D.3189 ])
        (lshiftrt:DI (subreg:DI (reg:TI 33 v1 [ y ]) 8)
            (const_int 63 [0x3f])))
bionic/libm/upstream-freebsd/lib/msun/src/s_copysignl.c:40 512
{*aarch64_lshr_sisd_or_int_di3}
     (expr_list:REG_DEAD (reg:TI 33 v1 [ y ])
        (nil)))

and then after reload this gets turned into

(insn 10 9 7 2 (set (reg:DI 33 v1 [orig:81 D.3189 ] [81])
        (lshiftrt:DI (reg:DI 33 v1 [ y+8 ])
            (const_int 63 [0x3f])))
bionic/libm/upstream-freebsd/lib/msun/src/s_copysignl.c:40 512
{*aarch64_lshr_sisd_or_int_di3}
     (nil))

which doesn't look right -- we seem to have lost the "TI", which I take to be
the bug.


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-10-02 14:03 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-09-25 19:24 [Bug middle-end/67718] New: [aarch64] long double incorrect code for copysign thanm at google dot com
2015-09-25 23:31 ` [Bug target/67718] " pinskia at gcc dot gnu.org
2015-09-29 15:17 ` thanm at google dot com
2015-09-30  2:29 ` ramana at gcc dot gnu.org
2015-10-02 14:03 ` thanm at google dot com

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).