[Bug target/67808] New: LRA ICEs on simple double to long double conversion test case

[Bug target/67808] New: LRA ICEs on simple double to long double conversion test case

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67808

            Bug ID: 67808
           Summary: LRA ICEs on simple double to long double conversion
                    test case
           Product: gcc
           Version: 6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: bergner at gcc dot gnu.org
  Target Milestone: ---

During a conversion from double to long double, LRA ends up going into a
infinite loop spilling things until it hits a threshold and quits with an ICE. 
The simplest test case I have at the moment is:

bergner@genoa:~/gcc/BUGS/LRA/20011123-1$ cat bug2.i
void
foo (long double *ldb1, double *db1)
{
  *ldb1 = *db1;
}
bergner@genoa:~/gcc/BUGS/LRA/20011123-1$
/home/bergner/gcc/build/gcc-fsf-mainline-bootstrap-lra-default-debug/gcc/xgcc
-B/home/bergner/gcc/build/gcc-fsf-mainline-bootstrap-lra-default-debug/gcc/ -S
-O1 -mvsx -S bug2.i
bug2.i: In function âfooâ:
bug2.i:5:1: internal compiler error: Max. number of generated reload insns per
insn is achieved (90)

 }
 ^
0x10962903 lra_constraints(bool)
       
/home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/lra-constraints.c:4351
0x10942af7 lra(_IO_FILE*)
        /home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/lra.c:2298
0x108c0ac7 do_reload
        /home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/ira.c:5391
0x108c1183 execute
        /home/bergner/gcc/gcc-fsf-mainline-bootstrap-lra-default/gcc/ira.c:5562


After IRA, things are pretty simple, with just the following one insn which
needs
a reload/spill, since we don't have memory to memory ops on POWER:

(insn 7 4 10 2 (parallel [
            (set (mem:TF (reg:DI 3 3 [ ldb1 ]) [0 *ldb1_5(D)+0 S16 A128])
                (float_extend:TF (mem:DF (reg:DI 4 4 [ db1 ]) [0 *db1_2(D)+0 S8
A64])))
            (use (const_double:DF 0.0 [0x0.0p+0]))
        ]) bug2.i:4 445 {*extenddftf2_internal}
     (expr_list:REG_DEAD (reg:DI 4 4 [ db1 ])
        (expr_list:REG_DEAD (reg:DI 3 3 [ ldb1 ])
            (nil))))

In LRA, comes along and gives us the following which looks good:

(insn 7 4 11 2 (parallel [
            (set (reg:TF 159)
                (float_extend:TF (mem:DF (reg:DI 4 4 [ db1 ]) [0 *db1_2(D)+0 S8
A64])))
            (use (const_double:DF 0.0 [0x0.0p+0]))
        ]) bug2.i:4 445 {*extenddftf2_internal}
     (expr_list:REG_DEAD (reg:DI 4 4 [ db1 ])
        (expr_list:REG_DEAD (reg:DI 3 3 [ ldb1 ])
            (nil))))

(insn 11 7 10 2 (set (mem:TF (reg:DI 3 3 [ ldb1 ]) [0 *ldb1_5(D)+0 S16 A128])
        (reg:TF 159)) bug2.i:4 435 {*movtf_64bit_dm}
     (nil))

But reg 159 was allocated to a VSX_REG and we don't have a TFmode mov* pattern
for vsx_reg -> fp_reg copy so we try to copy thru memory which is where we
started, so we loop forever until we hit the reload limit and ICE.
>From gcc-bugs-return-498551-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Thu Oct 01 20:07:19 2015
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From: "bergner at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/67808] LRA ICEs on simple double to long double conversion test case
Date: Thu, 01 Oct 2015 20:07:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?idg808

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|                            |powerpc64-linux,
                   |                            |powerpc64le-linux
                   |                            |powerpc-linux
                 CC|                            |meissner at gcc dot gnu.org,
                   |                            |segher at gcc dot gnu.org

--- Comment #1 from Peter Bergner <bergner at gcc dot gnu.org> ---
Talking with Mike and Segher offline, the problem is in the
*extenddftf2_internal pattern.  LRA is more pedantic than reload and wants
patterns to only use constraints that can hold types they're allowed to.

 (define_insn_and_split "*extenddftf2_internal"
   [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d")
        (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md")))
    (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d"))]

TFmode variables are not allowed in Altivec registers, yet alternative 2 for
the *extenddftf2_internal pattern allows "ws" which is a scalar FP value in a
VSX register (ie, a superset of the FP and Altivec registers).  Therefore, this
pattern should not use the "ws" constrint and should be using "d" instead.

[Bug target/67808] LRA ICEs on simple double to long double conversion test case

[meissner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67808

--- Comment #2 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Tue Oct  6 00:18:20 2015
New Revision: 228511

URL: https://gcc.gnu.org/viewcvs?rev=228511&root=gcc&view=rev
Log:
Apply fix for PR 67808

Added:
    branches/ibm/ieee/gcc/testsuite/gcc.target/powerpc/pr67808.c
Modified:
    branches/ibm/ieee/gcc/ChangeLog.meissner
    branches/ibm/ieee/gcc/config/rs6000/rs6000.md
    branches/ibm/ieee/gcc/testsuite/ChangeLog.meissner

[Bug target/67808] LRA ICEs on simple double to long double conversion test case

[meissner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67808

--- Comment #3 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Tue Oct  6 17:20:49 2015
New Revision: 228538

URL: https://gcc.gnu.org/viewcvs?rev=228538&root=gcc&view=rev
Log:
[gcc]
2015-10-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
            Peter Bergner  <bergner@vnet.ibm.com>

        PR target/67808
        * config/rs6000/rs6000.md (extenddftf2): In the expander, only
        allow registers, but provide insns for the combiner to create for
        loads from memory. Separate VSX code from non-VSX code. For
        non-VSX code, combine extenddftf2_fprs into extenddftf2 and rename
        externaldftf2_internal to externaldftf2_fprs. Reorder constraints
        so that registers come before memory operations. Drop support from
        converting DFmode to TFmode, if the DFmode value is in a GPR
        register.
        (extenddftf2_fprs): Likewise.
        (extenddftf2_internal): Likewise.
        (extenddftf2_vsx): Likewise.
        (extendsftf2): In the expander, only allow registers, but provide
        insns for the combiner to create for stores and loads.

[gcc/testsuite]
2015-10-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
            Peter Bergner <bergner@vnet.ibm.com>

        PR target/67808
        * gcc.target/powerpc/pr67808.c: New test.


Added:
    trunk/gcc/testsuite/gcc.target/powerpc/pr67808.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.md
    trunk/gcc/testsuite/ChangeLog