[Bug target/67994] New: __attribute__ ((target("arch=XXX"))) enables unsupported ISA

["hjl.tools at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67994

            Bug ID: 67994
           Summary: __attribute__ ((target("arch=XXX"))) enables
                    unsupported ISA
           Product: gcc
           Version: 5.3.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: hjl.tools at gmail dot com
                CC: ubizjak at gmail dot com
  Target Milestone: ---

[hjl@gnu-6 pr67985]$ cat r.i
unsigned int
__attribute__ ((target("arch=core2")))
__x86_rdrand(void)
{
  unsigned int retries = 100;
  unsigned int val;

  while (__builtin_ia32_rdrand32_step(&val) == 0)
    if (--retries == 0)
      return 0;

  return val;
}
[hjl@gnu-6 pr67985]$ /export/build/gnu/gcc-test/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-test/build-x86_64-linux/gcc/ -O2 -march=haswell -S -o
r.s r.i
[hjl@gnu-6 pr67985]$ cat r.s
        .file   "r.i"
        .text
        .p2align 4,,15
        .globl  __x86_rdrand
        .type   __x86_rdrand, @function
__x86_rdrand:
.LFB0:
        .cfi_startproc
        movl    $100, %eax
        movl    $1, %ecx
        jmp     .L2
        .p2align 4
.L4:
        subl    $1, %eax
        je      .L8
.L2:
        rdrand  %edx
        movl    %edx, -4(%rsp)
        cmovc   %ecx, %edx
        testl   %edx, %edx
        je      .L4
        movl    -4(%rsp), %eax
.L8:
        ret
        .cfi_endproc
.LFE0:
        .size   __x86_rdrand, .-__x86_rdrand
        .ident  "GCC: (GNU) 6.0.0 20151016 (experimental)"
        .section        .note.GNU-stack,"",@progbits
[hjl@gnu-6 pr67985]$ 

There should be a warning since rdrand isn't supported on Intel Core 2.