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From: "segher at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/68837] PowerPC switch statement performance Date: Thu, 04 Jun 2020 20:18:20 +0000 [thread overview] Message-ID: <bug-68837-4-ESEwmdZrpR@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-68837-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68837 --- Comment #4 from Segher Boessenkool <segher at gcc dot gnu.org> --- On Power9 the lwa insn is cracked into an lwz and an extsw, just like on older CPUs. Cracked instructions have fewer constraints on p9 than they did on most older CPUs though (it doesn't have to be first in a fetch group any more). It still saves one insn to execute if lwz would be enough. Another option may be to just do an ld even: this saves the number of insns needed, but it takes more space for the table (so it won't be cached / prefetched as well), and absolute addresses require relocations.
next prev parent reply other threads:[~2020-06-04 20:18 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <bug-68837-4@http.gcc.gnu.org/bugzilla/> 2020-06-03 9:08 ` guihaoc at gcc dot gnu.org 2020-06-04 15:43 ` dje at gcc dot gnu.org 2020-06-04 20:18 ` segher at gcc dot gnu.org [this message] 2020-06-11 5:15 ` guihaoc at gcc dot gnu.org
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