[Bug target/78904] zero-extracts are not effective

["cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78904

--- Comment #21 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:8ebc7e0b0ddf4679cf09ed6836fac30ca01d3ba0

commit r14-5539-g8ebc7e0b0ddf4679cf09ed6836fac30ca01d3ba0
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Thu Nov 16 18:07:36 2023 +0100

    i386: Optimize QImode insn with high input registers

    Sometimes the compiler emits the following code with <insn>qi_ext<mode>_0:

            shrl    $8, %eax
            addb    %bh, %al

    Patch introduces new low part QImode insn patterns with both of
    their input arguments extracted from high register.  This invalid
    insn is split after reload to a move from the high register
    and <insn>qi_ext<mode>_0 instruction.  The combine pass is able to
    convert shift to zero/sign-extract sub-RTX, which we split to the
    optimal:

            movzbl  %bh, %edx
            addb    %ah, %dl

            PR target/78904

    gcc/ChangeLog:

            * config/i386/i386.md (*addqi_ext2<mode>_0):
            New define_insn_and_split pattern.
            (*subqi_ext2<mode>_0): Ditto.
            (*<code>qi_ext2<mode>_0): Ditto.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr78904-10.c: New test.
            * gcc.target/i386/pr78904-10a.c: New test.
            * gcc.target/i386/pr78904-10b.c: New test.