From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 588973858D33; Wed, 19 Apr 2023 15:04:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 588973858D33 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1681916664; bh=eF3o1j2fzAPecbOxigjGHtbFOkGFiQArUPNi73wfpuo=; h=From:To:Subject:Date:In-Reply-To:References:From; b=CB6WeoAWbLEhAFOpfMgNF8Sxrn7S7DY2fyDv0s8dWMQ88WtrOp/NKNo4MgsVac1Ma E3vgzzkIa2Eb1yFHV/M9n0HQPRkzMriLJHd7tuwdwCuXgz7TD2mx3OKw+nuPjq2RUD AizYYOLqrIXBY+c83x8S5YtzCHXm6KiPbz33cl48= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/78904] zero-extracts are not effective Date: Wed, 19 Apr 2023 15:04:22 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 7.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: RESOLVED X-Bugzilla-Resolution: FIXED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: ubizjak at gmail dot com X-Bugzilla-Target-Milestone: 7.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D78904 --- Comment #15 from CVS Commits --- The master branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:0df6d181230f0480547ed08b4e4354db68242724 commit r14-85-g0df6d181230f0480547ed08b4e4354db68242724 Author: Uros Bizjak Date: Wed Apr 19 17:00:52 2023 +0200 i386: Emit compares between high registers and memory Following code: typedef __SIZE_TYPE__ size_t; struct S1s { char pad1; char val; short pad2; }; extern char ts[256]; _Bool foo (struct S1s a, size_t i) { return (ts[i] > a.val); } compiles with -O2 to: movl %edi, %eax movsbl %ah, %edi cmpb %dil, ts(%rsi) setg %al ret the compare could use high register %ah instead of %dil: movl %edi, %eax cmpb ts(%rsi), %ah setl %al ret Use any_extract code iterator to handle signed and unsigned extracts from high register and introduce peephole2 patterns to propagate norex memory opeerand into the compare insn. gcc/ChangeLog: PR target/78904 PR target/78952 * config/i386/i386.md (*cmpqi_ext_1_mem_rex64): New insn pattern. (*cmpqi_ext_1): Use nonimmediate_operand predicate for operand 0. Use any_extract code iterator. (*cmpqi_ext_1 peephole2): New peephole2 pattern. (*cmpqi_ext_2): Use any_extract code iterator. (*cmpqi_ext_3_mem_rex64): New insn pattern. (*cmpqi_ext_1): Use general_operand predicate for operand 1. Use any_extract code iterator. (*cmpqi_ext_3 peephole2): New peephole2 pattern. (*cmpqi_ext_4): Use any_extract code iterator. gcc/testsuite/ChangeLog: PR target/78904 PR target/78952 * gcc.target/i386/pr78952-3.c: New test.=