From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 8FEA0385743E; Mon, 16 Aug 2021 08:15:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8FEA0385743E From: "crazylht at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/83827] vector load/store with struct in registers Date: Mon, 16 Aug 2021 08:15:05 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 8.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: crazylht at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 16 Aug 2021 08:15:06 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D83827 --- Comment #4 from Hongtao.liu --- (In reply to Hongtao.liu from comment #2) > For f, pass_combine failed=20 >=20 > Trying 20, 21 -> 22: > 20: clobber r83:TI > 21: r83:TI#0=3Dr88:DI > REG_DEAD r88:DI > 22: r83:TI#8=3Dr89:DI > REG_DEAD r89:DI > Can't combine i2 into i3 >=20 > (insn 20 6 21 2 (clobber (reg/v:TI 83 [ x ])) "test.cpp":3:11 -1 > (nil)) Clobber was generate by simplify_gen_subreg_concatn to simplify=20=20 (insn 4 3 5 2 (set (concatn:TI [ (reg:DI 88) (reg:DI 89 [+8 ]) ]) (const_int 0 [0])) "/export/users2/liuhongt/tools-build/build_intel-innersource_master_debug/t= est.cpp":3:11 73 {*movti_internal} (nil)) (insn 5 4 6 2 (set (subreg:DF (reg:TI 84) 0) (reg:DF 85)) "test.cpp":3:11 133 {*movdf_internal} (nil)) (insn 6 5 7 2 (set (subreg:DF (reg:TI 84) 8) (reg:DF 86)) "test.cpp":3:11 133 {*movdf_internal} (nil)) to (insn 17 3 18 2 (set (reg:DI 88) (reg:DI 85)) "test1.cpp":3:11 74 {*movdi_internal} (nil)) (insn 18 17 5 2 (set (reg:DI 89 [+8 ]) (const_int 0 [0])) "test1.cpp":3:11 74 {*movdi_internal} (nil)) (insn 5 18 19 2 (set (reg:DI 89 [+8 ]) (reg:DI 86)) "test1.cpp":3:11 74 {*movdi_internal} (nil)) (insn 19 5 20 2 (clobber (reg/v:TI 83 [ x ])) "test1.cpp":3:11 -1 (nil)) (insn 20 19 21 2 (set (subreg:DI (reg/v:TI 83 [ x ]) 0) (reg:DI 88)) "test1.cpp":3:11 74 {*movdi_internal} (nil)) (insn 21 20 7 2 (set (subreg:DI (reg/v:TI 83 [ x ]) 8) (reg:DI 89 [+8 ])) "test1.cpp":3:11 74 {*movdi_internal} (nil))=