From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9B9A3385DC00; Sat, 4 Apr 2020 17:24:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9B9A3385DC00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1586021064; bh=Pq+6GMUhcre5D2n+hElNcTZ929Vv1SD8T19gOHrXYXA=; h=From:To:Subject:Date:In-Reply-To:References:From; b=qW1LIWpstRAVQzZ+vxGzu0Xhixzq6r31kaPnepNXQHSZ550OmUmVSa/0PMGwSXS5V HloUGx35U01tGm/1R/SBJEq7vPIs2HbhAT2wko6isIXUYlEsKRgcIwlIXXLEwriVMb Wpc+1KhYFMCNToV/jxo8yg69qDieg6ch9eiDFrkM= From: "pinskia at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/87763] [9/10 Regression] aarch64 target testcases fail after r265398 Date: Sat, 04 Apr 2020 17:24:24 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 9.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: pinskia at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: rsandifo at gcc dot gnu.org X-Bugzilla-Target-Milestone: 9.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Apr 2020 17:24:24 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D87763 --- Comment #68 from Andrew Pinski --- (In reply to rsandifo@gcc.gnu.org from comment #62) > For the two bfi ones: are we really sure that the old code is better? > It's a difference between a MOV and a BFI or an AND and an ORR. > The BFI wins (at least for code-size) if we need the same MOV > for something else. But the AND/ORR sequence wins in high register > pressure, since it only needs one register rather than two. On some processors (ThunderX2 and OcteonTX2 and maybe others [I have not lo= oked into all of the micro-arches there are]), the mov/bfi case is most likely better as the mov is removed during renaming phase and not actually issued = so it will turn into just one instruction in a latency of 1 rather than 2 instructions and latency of 2.=