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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/87832] AMD pipeline models are very costly size-wise
Date: Tue, 01 Nov 2022 12:21:13 +0000	[thread overview]
Message-ID: <bug-87832-4-wj14RWkT9k@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-87832-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87832

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Alexander Monakov <amonakov@gcc.gnu.org>:

https://gcc.gnu.org/g:5cee5f94000ee5eabce9b223c44c7923c1c69f61

commit r13-3589-g5cee5f94000ee5eabce9b223c44c7923c1c69f61
Author: Alexander Monakov <amonakov@ispras.ru>
Date:   Mon Oct 31 17:35:57 2022 +0300

    i386: correct integer division modeling in znver.md

    In znver.md, division instructions have descriptions like

    (define_insn_reservation "znver1_idiv_DI" 41
                            (and (eq_attr "cpu" "znver1,znver2")
                                 (and (eq_attr "type" "idiv")
                                      (and (eq_attr "mode" "DI")
                                           (eq_attr "memory" "none"))))
                            "znver1-double,znver1-ieu2*41")

    which says that DImode idiv has latency 41 (which is correct) and that
    it occupies 2nd integer execution unit for 41 consecutive cycles, but
    that is not correct:

    1) the division instruction is partially pipelined, and has throughput
       1/14, not 1/41;

    2) for the most part it occupies a separate division unit, not the
       general arithmetic unit.

    Evidently, interaction of such 41-cycle paths with the rest of
    reservations causes a combinatorial explosion in the automaton.

    Fix this by modeling the integer division unit properly, and correcting
    reservations to use the measured reciprocal throughput of those
    instructions (available from uops.info). A similar correction for
    floating-point divisions is left for a followup patch.

    Top 5 znver table sizes, before:

    68692 r znver1_ieu_check
    68692 r znver1_ieu_transitions
    99792 r znver1_ieu_min_issue_delay
    428108 r znver1_fp_min_issue_delay
    856216 r znver1_fp_transitions

    After:

    1454 r znver1_ieu_translate
    1454 r znver1_translate
    2304 r znver1_ieu_transitions
    428108 r znver1_fp_min_issue_delay
    856216 r znver1_fp_transitions

    gcc/ChangeLog:

            PR target/87832
            * config/i386/znver.md (znver1_idiv): New automaton.
            (znver1-idiv): New unit.
            (znver1_idiv_DI): Correct unit and cycles in the reservation.
            (znver1_idiv_SI): Ditto.
            (znver1_idiv_HI): Ditto.
            (znver1_idiv_QI): Ditto.
            (znver1_idiv_mem_DI): Ditto.
            (znver1_idiv_mem_SI): Ditto.
            (znver1_idiv_mem_HI): Ditto.
            (znver1_idiv_mem_QI): Ditto.
            (znver3_idiv_DI): Ditto.
            (znver3_idiv_SI): Ditto.
            (znver3_idiv_HI): Ditto.
            (znver3_idiv_QI): Ditto.
            (znver3_idiv_mem_DI): Ditto.
            (znver3_idiv_mem_SI): Ditto.
            (znver3_idiv_mem_HI): Ditto.
            (znver3_idiv_mem_QI): Ditto.

  parent reply	other threads:[~2022-11-01 12:21 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <bug-87832-4@http.gcc.gnu.org/bugzilla/>
2022-10-24 18:48 ` amonakov at gcc dot gnu.org
2022-11-01 12:21 ` cvs-commit at gcc dot gnu.org [this message]
2022-11-07 11:23 ` amonakov at gcc dot gnu.org
2022-11-16 13:41 ` cvs-commit at gcc dot gnu.org
2022-11-16 13:41 ` cvs-commit at gcc dot gnu.org
2022-11-16 13:48 ` amonakov at gcc dot gnu.org
2022-11-16 14:16 ` hubicka at ucw dot cz
2022-11-16 14:30 ` amonakov at gcc dot gnu.org
2022-11-16 15:33   ` Jan Hubicka
2022-11-16 15:34 ` hubicka at ucw dot cz
2022-11-16 17:15 ` amonakov at gcc dot gnu.org
2022-12-07 15:23 ` amonakov at gcc dot gnu.org
2022-12-08  9:48 ` marxin at gcc dot gnu.org
2023-01-02 16:39 ` cvs-commit at gcc dot gnu.org

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